diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h
index 4907f4921d..3f980d1552 100644
--- a/src/soc/intel/tigerlake/chip.h
+++ b/src/soc/intel/tigerlake/chip.h
@@ -236,6 +236,32 @@ struct soc_intel_tigerlake_config {
 	 * Bit 0: MISCCFG_GPDLCGEN
 	 */
 	uint8_t gpio_pm[TOTAL_GPIO_COMM];
+
+	/* DP config */
+	/*
+	 * Port config
+	 * 0:Disabled, 1:eDP, 2:MIPI DSI
+	 */
+	uint8_t DdiPortAConfig;
+	uint8_t DdiPortBConfig;
+
+	/* Enable(1)/Disable(0) HPD */
+	uint8_t DdiPortAHpd;
+	uint8_t DdiPortBHpd;
+	uint8_t DdiPortCHpd;
+	uint8_t DdiPort1Hpd;
+	uint8_t DdiPort2Hpd;
+	uint8_t DdiPort3Hpd;
+	uint8_t DdiPort4Hpd;
+
+	/* Enable(1)/Disable(0) DDC */
+	uint8_t DdiPortADdc;
+	uint8_t DdiPortBDdc;
+	uint8_t DdiPortCDdc;
+	uint8_t DdiPort1Ddc;
+	uint8_t DdiPort2Ddc;
+	uint8_t DdiPort3Ddc;
+	uint8_t DdiPort4Ddc;
 };
 
 typedef struct soc_intel_tigerlake_config config_t;
diff --git a/src/soc/intel/tigerlake/romstage/fsp_params_tgl.c b/src/soc/intel/tigerlake/romstage/fsp_params_tgl.c
index a4533c9e6c..6ed3dcd2de 100644
--- a/src/soc/intel/tigerlake/romstage/fsp_params_tgl.c
+++ b/src/soc/intel/tigerlake/romstage/fsp_params_tgl.c
@@ -84,6 +84,24 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg,
 	else
 		m_cfg->InternalGfx = 0x1;
 
+	/* DP port config */
+	m_cfg->DdiPortAConfig = config->DdiPortAConfig;
+	m_cfg->DdiPortBConfig = config->DdiPortBConfig;
+	m_cfg->DdiPortAHpd = config->DdiPortAHpd;
+	m_cfg->DdiPortBHpd = config->DdiPortBHpd;
+	m_cfg->DdiPortCHpd = config->DdiPortCHpd;
+	m_cfg->DdiPort1Hpd = config->DdiPort1Hpd;
+	m_cfg->DdiPort2Hpd = config->DdiPort2Hpd;
+	m_cfg->DdiPort3Hpd = config->DdiPort3Hpd;
+	m_cfg->DdiPort4Hpd = config->DdiPort4Hpd;
+	m_cfg->DdiPortADdc = config->DdiPortADdc;
+	m_cfg->DdiPortBDdc = config->DdiPortBDdc;
+	m_cfg->DdiPortCDdc = config->DdiPortCDdc;
+	m_cfg->DdiPort1Ddc = config->DdiPort1Ddc;
+	m_cfg->DdiPort2Ddc = config->DdiPort2Ddc;
+	m_cfg->DdiPort3Ddc = config->DdiPort3Ddc;
+	m_cfg->DdiPort4Ddc = config->DdiPort4Ddc;
+
 	/* Enable Hyper Threading */
 	m_cfg->HyperThreading = 1;
 	/* Disable Lock PCU Thermal Management registers */