src/soc/intel/mtl: Add VPU support

This change adds support for enabling VPU on MTL SoC.

BUG=b:240665069
TEST=build coreboot mtlrvp

Signed-off-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com>
Change-Id: Ie79b45f34a669b9ff777599cb85217abac6cb74e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66566
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>

src/soc/intel/meteorlake/fsp_params.c

@@ -419,6 +419,7 @@ static void fill_fsps_ai_params(FSP_S_CONFIG *s_cfg,
 		const struct soc_intel_meteorlake_config *config)
 {
 	s_cfg->GnaEnable = is_devfn_enabled(PCI_DEVFN_GNA);
+	s_cfg->VpuEnable = is_devfn_enabled(PCI_DEVFN_VPU);
 }
 
 static void arch_silicon_init_params(FSPS_ARCH_UPD *s_arch_cfg)

src/soc/intel/meteorlake/include/soc/pci_devs.h

@@ -72,6 +72,10 @@
 #define  PCI_DEV_TCSS_DMA0	_PCI_DEV(TCSS, 2)
 #define  PCI_DEV_TCSS_DMA1	_PCI_DEV(TCSS, 3)
 
+#define PCI_DEV_SLOT_VPU	0x0b
+#define  PCI_DEVFN_VPU		_PCI_DEVFN(VPU, 0)
+#define  PCI_DEV_VPU		_PCI_DEV(VPU, 0)
+
 #define PCI_DEV_SLOT_VMD	0x0e
 #define  PCI_DEVFN_VMD		_PCI_DEVFN(VMD, 0)
 #define  PCI_DEV_VMD		_PCI_DEV(VMD, 0)