soc/amd/picasso: add monotonic_timer
On Zork(picasso) platform we run verstage on the PSP. It has its own timer, but the frequency is not matched with TSC. To ease the work to merge timestamps from the PSP and TSC, add a layer around tsc to have microsecond granularity for timestamp table. PSP already records timestamp in microseconds. BUG=b:159220781 BRANCH=zork TEST=build, flash and boot, check timestamps are correct Signed-off-by: Kangheui Won <khwon@chromium.org> Change-Id: Ifced4a84071be8da547e252167ec21cd42f20ccc Reviewed-on: https://review.coreboot.org/c/coreboot/+/46058 Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Eric Peers <epeers@google.com> Reviewed-by: Rob Barnes <robbarnes@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -24,7 +24,7 @@ config CPU_SPECIFIC_OPTIONS
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select IOAPIC
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select IOAPIC
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select HAVE_EM100_SUPPORT
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select HAVE_EM100_SUPPORT
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select HAVE_USBDEBUG_OPTIONS
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select HAVE_USBDEBUG_OPTIONS
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select TSC_MONOTONIC_TIMER
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select COLLECT_TIMESTAMPS_NO_TSC
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select SOC_AMD_COMMON_BLOCK_SPI
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select SOC_AMD_COMMON_BLOCK_SPI
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select TSC_SYNC_LFENCE
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select TSC_SYNC_LFENCE
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select UDELAY_TSC
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select UDELAY_TSC
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@ -18,6 +18,7 @@ bootblock-y += southbridge.c
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bootblock-y += i2c.c
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bootblock-y += i2c.c
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bootblock-y += uart.c
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bootblock-y += uart.c
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bootblock-$(CONFIG_PICASSO_CONSOLE_UART) += uart_console.c
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bootblock-$(CONFIG_PICASSO_CONSOLE_UART) += uart_console.c
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bootblock-y += monotonic_timer.c
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bootblock-y += tsc_freq.c
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bootblock-y += tsc_freq.c
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bootblock-y += gpio.c
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bootblock-y += gpio.c
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bootblock-y += smi_util.c
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bootblock-y += smi_util.c
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@ -34,6 +35,7 @@ romstage-y += reset.c
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romstage-y += memmap.c
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romstage-y += memmap.c
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romstage-y += uart.c
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romstage-y += uart.c
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romstage-$(CONFIG_PICASSO_CONSOLE_UART) += uart_console.c
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romstage-$(CONFIG_PICASSO_CONSOLE_UART) += uart_console.c
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romstage-y += monotonic_timer.c
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romstage-y += tsc_freq.c
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romstage-y += tsc_freq.c
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romstage-y += aoac.c
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romstage-y += aoac.c
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romstage-y += southbridge.c
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romstage-y += southbridge.c
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@ -49,6 +51,7 @@ verstage-y += aoac.c
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verstage_x86-y += gpio.c
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verstage_x86-y += gpio.c
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verstage_x86-y += uart.c
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verstage_x86-y += uart.c
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verstage_x86-$(CONFIG_PICASSO_CONSOLE_UART) += uart_console.c
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verstage_x86-$(CONFIG_PICASSO_CONSOLE_UART) += uart_console.c
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verstage_x86-y += monotonic_timer.c
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verstage_x86-y += tsc_freq.c
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verstage_x86-y += tsc_freq.c
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verstage_x86-y += reset.c
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verstage_x86-y += reset.c
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@ -72,6 +75,7 @@ ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c
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ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c
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ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c
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ramstage-y += uart.c
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ramstage-y += uart.c
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ramstage-$(CONFIG_PICASSO_CONSOLE_UART) += uart_console.c
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ramstage-$(CONFIG_PICASSO_CONSOLE_UART) += uart_console.c
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ramstage-y += monotonic_timer.c
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ramstage-y += tsc_freq.c
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ramstage-y += tsc_freq.c
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ramstage-y += finalize.c
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ramstage-y += finalize.c
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ramstage-y += soc_util.c
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ramstage-y += soc_util.c
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@ -86,6 +90,7 @@ ramstage-y += dmi.c
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smm-y += smihandler.c
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smm-y += smihandler.c
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smm-y += smi_util.c
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smm-y += smi_util.c
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smm-y += monotonic_timer.c
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smm-y += tsc_freq.c
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smm-y += tsc_freq.c
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ifeq ($(CONFIG_DEBUG_SMI),y)
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ifeq ($(CONFIG_DEBUG_SMI),y)
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smm-y += uart.c
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smm-y += uart.c
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@ -0,0 +1,16 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <cpu/x86/msr.h>
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#include <cpu/x86/tsc.h>
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#include <timer.h>
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#include <timestamp.h>
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void timer_monotonic_get(struct mono_time *mt)
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{
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mono_time_set_usecs(mt, timestamp_get());
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}
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uint64_t timestamp_get(void)
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{
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return rdtscll() / tsc_freq_mhz();
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}
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