mb/google/volteer/halvor: Update settings for audio function

Configure overridetree settings for audio function.

BUG=b:153680359, b:163382106
TEST=FW_NAME=halvor emerge-volteer coreboot chromeos-bootimage

Signed-off-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
Change-Id: I107f6fc21b99d80d69931139dc50e7d5873a8e52
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44409
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Sathyanarayana Nujella <sathyanarayana.nujella@intel.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
This commit is contained in:
Frank Wu 2020-09-24 19:35:37 +08:00 committed by Tim Wawrzynczak
parent b4b8c1d174
commit 9f963d3325
1 changed files with 7 additions and 10 deletions

View File

@ -29,7 +29,9 @@ chip soc/intel/tigerlake
register "uid" = "0"
register "desc" = ""Right Speaker Amp""
register "name" = ""MAXR""
device i2c 31 on end
device i2c 31 on
probe AUDIO MAX98373_ALC5682I_I2S_UP4
end
end
chip drivers/i2c/max98373
register "vmon_slot_no" = "2"
@ -37,7 +39,9 @@ chip soc/intel/tigerlake
register "uid" = "1"
register "desc" = ""Left Speaker Amp""
register "name" = ""MAXL""
device i2c 32 on end
device i2c 32 on
probe AUDIO MAX98373_ALC5682I_I2S_UP4
end
end
end # I2C #0 0xA0E8
device pci 15.1 on
@ -113,13 +117,6 @@ chip soc/intel/tigerlake
device i2c 15 on end
end
end # I2C5 0xA0C6
device pci 1f.3 on
chip drivers/generic/max98357a
register "hid" = ""MX98357A""
register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_F18)"
register "sdmode_delay" = "5"
device generic 0 on end
end
end # Intel HD audio 0xA0C8-A0CF
device pci 1f.3 on end # Intel HD audio 0xA0C8-A0CF
end
end