Persimmon: disable APU PCIe port 3

According to DB-FT1 rev. D schematics the APU PCIe lane 3 is unconnected.
Reflect this fact in the mainboard code.

Change-Id: Ic98f4a63ef971628df7fbf97f56b80ebe7cb8517
Signed-off-by: Jens Rottmann <JRottmann@LiPPERTembedded.de>
Reviewed-on: http://review.coreboot.org/2447
Tested-by: build bot (Jenkins)
Reviewed-by: Peter Stuge <peter@stuge.se>
This commit is contained in:
Jens Rottmann 2013-02-18 20:13:27 +01:00 committed by Peter Stuge
parent fa8702cf2a
commit 9fba303435
1 changed files with 1 additions and 1 deletions

View File

@ -50,7 +50,7 @@
#define GNB_GPP_PORT6_HOTPLUG_SUPPORT 0 //0:Disable 1:Basic 3:Enhanced
//GNB GPP Port7
#define GNB_GPP_PORT7_PORT_PRESENT 1 //0:Disable 1:Enable
#define GNB_GPP_PORT7_PORT_PRESENT 0 //0:Disable 1:Enable
#define GNB_GPP_PORT7_SPEED_MODE 2 //0:Auto 1:GEN1 2:GEN2
#define GNB_GPP_PORT7_LINK_ASPM 3 //0:Disable 1:L0s 2:L1 3:L0s+L1
#define GNB_GPP_PORT7_CHANNEL_TYPE 4 //0:LowLoss(-3.5db) 1:HighLoss(-6db) 2:Half-swing(0db)