arch/x86: Enable POSTCAR_CONSOLE by default

Almost all platforms force it on. Make it enabled by
default but under user control to optionally disable it.

Change-Id: I6b0f19c8bfd6ffed93023d57a1d28ca6acc06835
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34803
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Kyösti Mälkki 2019-08-09 07:09:48 +03:00 committed by Martin Roth
parent 7ca7dbc0f5
commit 9fc12e0d4e
21 changed files with 1 additions and 21 deletions

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@ -13,7 +13,7 @@ config BOOTBLOCK_CONSOLE
config POSTCAR_CONSOLE
bool "Enable console output during postcar."
depends on POSTCAR_STAGE
default n
default y
help
Use console during the postcar if supported

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@ -19,7 +19,6 @@ config PLATFORM_USES_FSP1_1
select UEFI_2_4_BINDING
select INTEL_GMA_ADD_VBT if RUN_FSP_GOP
select POSTCAR_STAGE
select POSTCAR_CONSOLE
help
Does the code require the Intel Firmware Support Package?

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@ -13,7 +13,6 @@ config BOARD_SPECIFIC_OPTIONS
select MAINBOARD_HAS_NATIVE_VGA_INIT
select MAINBOARD_FORCE_NATIVE_VGA_INIT
select POSTCAR_STAGE
select POSTCAR_CONSOLE
config MAINBOARD_DIR
string

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@ -12,7 +12,6 @@ config BOARD_SPECIFIC_OPTIONS
select MAINBOARD_HAS_NATIVE_VGA_INIT
select MAINBOARD_FORCE_NATIVE_VGA_INIT
select POSTCAR_STAGE
select POSTCAR_CONSOLE
config MAINBOARD_DIR
string

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@ -100,7 +100,6 @@ config FSP_DEBUG_ALL
select DISPLAY_ESRAM_LAYOUT
select DISPLAY_FSP_CALLS_AND_STATUS
select DISPLAY_FSP_HEADER
select POSTCAR_CONSOLE
select VERIFY_HOBS
help
Turn on debug support to display HOBS, MTRRS, SMM_MEMORY_MAP, UPD_DATA

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@ -27,7 +27,6 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
select INTEL_GMA_ACPI
select INTEL_GMA_SSC_ALTERNATE_REF
select POSTCAR_STAGE
select POSTCAR_CONSOLE
select PARALLEL_MP
config CBFS_SIZE

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@ -20,7 +20,6 @@ config NORTHBRIDGE_INTEL_HASWELL
select INTEL_DDI
select INTEL_GMA_ACPI
select POSTCAR_STAGE
select POSTCAR_CONSOLE
select C_ENVIRONMENT_BOOTBLOCK
select BOOTBLOCK_CONSOLE

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@ -28,7 +28,6 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
select INTEL_EDID
select HAVE_VGA_TEXT_FRAMEBUFFER if MAINBOARD_DO_NATIVE_VGA_INIT
select POSTCAR_STAGE
select POSTCAR_CONSOLE
select PARALLEL_MP
config NORTHBRIDGE_INTEL_SUBTYPE_I945GC

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@ -21,7 +21,6 @@ config NORTHBRIDGE_INTEL_NEHALEM
select INTEL_GMA_ACPI
select CACHE_MRC_SETTINGS
select POSTCAR_STAGE
select POSTCAR_CONSOLE
select HAVE_DEBUG_RAM_SETUP
if NORTHBRIDGE_INTEL_NEHALEM

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@ -29,7 +29,6 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
select INTEL_EDID if MAINBOARD_DO_NATIVE_VGA_INIT
select INTEL_GMA_ACPI
select POSTCAR_STAGE
select POSTCAR_CONSOLE
select PARALLEL_MP
select C_ENVIRONMENT_BOOTBLOCK

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@ -21,7 +21,6 @@ config NORTHBRIDGE_INTEL_SANDYBRIDGE
select HAVE_DEBUG_RAM_SETUP
select INTEL_GMA_ACPI
select POSTCAR_STAGE
select POSTCAR_CONSOLE
if NORTHBRIDGE_INTEL_SANDYBRIDGE

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@ -27,7 +27,6 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
select INTEL_GMA_ACPI
select CACHE_MRC_SETTINGS
select POSTCAR_STAGE
select POSTCAR_CONSOLE
select PARALLEL_MP
config CBFS_SIZE

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@ -57,7 +57,6 @@ config CPU_SPECIFIC_OPTIONS
select PARALLEL_MP_AP_WORK
select HAVE_SMI_HANDLER
select POSTCAR_STAGE
select POSTCAR_CONSOLE
select SSE2
select RTC

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@ -77,7 +77,6 @@ config CPU_SPECIFIC_OPTIONS
select PARALLEL_MP_AP_WORK
select HAVE_SMI_HANDLER
select POSTCAR_STAGE
select POSTCAR_CONSOLE
select SSE2
select RTC

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@ -57,7 +57,6 @@ config CPU_SPECIFIC_OPTIONS
select PCIEXP_CLK_PM
select PCIEXP_L1_SUB_STATE
select PCIEX_LENGTH_256MB
select POSTCAR_CONSOLE
select POSTCAR_STAGE
select PMC_INVALID_READ_AFTER_WRITE
select PMC_GLOBAL_RESET_ENABLE_LOCK

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@ -37,7 +37,6 @@ config CPU_SPECIFIC_OPTIONS
select INTEL_GMA_ACPI
select INTEL_GMA_SWSMISCI
select POSTCAR_STAGE
select POSTCAR_CONSOLE
select CPU_INTEL_COMMON
select CPU_HAS_L2_ENABLE_MSR

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@ -37,7 +37,6 @@ config CPU_SPECIFIC_OPTIONS
select CPU_INTEL_COMMON
select INTEL_GMA_ACPI
select POSTCAR_STAGE
select POSTCAR_CONSOLE
select HAVE_POWER_STATE_AFTER_FAILURE
select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE
select NO_FIXED_XIP_ROM_SIZE

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@ -76,7 +76,6 @@ config CPU_SPECIFIC_OPTIONS
select PARALLEL_MP
select PARALLEL_MP_AP_WORK
select PLATFORM_USES_FSP2_0
select POSTCAR_CONSOLE
select POSTCAR_STAGE
select REG_SCRIPT
select SMP

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@ -29,7 +29,6 @@ config CPU_SPECIFIC_OPTIONS
select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH
select BOOT_DEVICE_SUPPORTS_WRITES
select DEBUG_GPIO
select POSTCAR_CONSOLE
select SOC_INTEL_COMMON
select SOC_INTEL_COMMON_RESET
select PLATFORM_USES_FSP2_0

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@ -32,7 +32,6 @@ config CPU_SPECIFIC_OPTIONS
select PARALLEL_MP_AP_WORK
select MICROCODE_BLOB_UNDISCLOSED
select PLATFORM_USES_FSP2_1
select POSTCAR_CONSOLE
select POSTCAR_STAGE
select REG_SCRIPT
select SMP

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@ -92,7 +92,6 @@ config USE_FSP2_0_DRIVER
select PLATFORM_USES_FSP2_0
select UDK_2015_BINDING
select INTEL_GMA_ADD_VBT if RUN_FSP_GOP
select POSTCAR_CONSOLE
select POSTCAR_STAGE
config USE_FSP1_1_DRIVER