AMD F15tn northbridge: Remove the misleading 0x100 from the limitk.
I dont known if missed something, but why an extra 0x100 was added to limit? My board would get the wrong memory table entry 7f000000-7fffffff as RAM, which is higher than TOM. coreboot memory table: 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES 1. 0000000000001000-000000000009ffff: RAM 2. 00000000000c0000-000000005e13efff: RAM 3. 000000005e13f000-000000005effffff: CONFIGURATION TABLES 4. 000000005f000000-000000007effffff: RESERVED 5. 000000007f000000-000000007fffffff: RAM 6. 00000000a0000000-00000000afffffff: RESERVED Ronald G. Minnich: I think someone who wrote the code was trying to round up the next 0x100 boundary and did it incorrectly. Here is code that would do it correctly: limitk = ((resource_t)((d.mask + 0x00000ff) & 0x1fffff00)) << 9 ; Zheng: Plus 0xFF is correct, but the d.mask take bit 0 as enable it. This bit should be clear when we try to calculate the limitk. Change-Id: I3848ed5f23001e5bd61a19833650fe13df26eef3 Signed-off-by: Zheng Bao <zheng.bao@amd.com> Signed-off-by: zbao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/1265 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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@ -790,7 +790,7 @@ static void domain_set_resources(device_t dev)
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if (!(d.mask & 1)) continue;
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basek = ((resource_t)(d.base & 0x1fffff00)) << 9; // could overflow, we may lost 6 bit here
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limitk = ((resource_t)((d.mask + 0x00000100) & 0x1fffff00)) << 9 ;
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limitk = ((resource_t)(((d.mask & ~1) + 0x000FF) & 0x1fffff00)) << 9 ;
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sizek = limitk - basek;
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