diff --git a/src/drivers/pc80/rtc/mc146818rtc.c b/src/drivers/pc80/rtc/mc146818rtc.c index 0e9a88ab5c..830ff09a59 100644 --- a/src/drivers/pc80/rtc/mc146818rtc.c +++ b/src/drivers/pc80/rtc/mc146818rtc.c @@ -26,6 +26,8 @@ #include #include #include +#include +#include /* There's no way around this include guard. option_table.h is autogenerated */ #if IS_ENABLED(CONFIG_USE_OPTION_TABLE) @@ -95,7 +97,7 @@ static void cmos_set_checksum(int range_start, int range_end, int cks_loc) #define RTC_FREQ_SELECT_DEFAULT (RTC_REF_CLCK_32KHZ | RTC_RATE_1024HZ) #ifndef __SMM__ -void cmos_init(bool invalid) +static bool __cmos_init(bool invalid) { bool cmos_invalid; bool checksum_invalid = false; @@ -111,7 +113,7 @@ void cmos_init(bool invalid) * was due to the RTC alarm. */ if (acpi_is_wakeup_s3()) - return; + return false; #endif /* __PRE_RAM__ */ printk(BIOS_DEBUG, "RTC Init\n"); @@ -150,7 +152,8 @@ void cmos_init(bool invalid) cmos_invalid ? " Power Problem":"", checksum_invalid ? " Checksum invalid":"", clear_cmos ? " zeroing cmos":""); - } + } else + clear_cmos = false; /* Setup the real time clock */ cmos_write(RTC_CONTROL_DEFAULT, RTC_CONTROL); @@ -172,6 +175,31 @@ void cmos_init(bool invalid) /* Clear any pending interrupts */ cmos_read(RTC_INTR_FLAGS); + + return clear_cmos; +} + +static void cmos_init_vbnv(bool invalid) +{ + uint8_t vbnv[VBOOT_VBNV_BLOCK_SIZE]; + + /* __cmos_init() will clear vbnv contents when a known rtc failure + occurred with !CONFIG_USE_OPTION_TABLE. However, __cmos_init() may + clear vbnv data for other internal reasons. For that, always back up + the vbnv contents and conditionally save them when __cmos_init() + indicates cmos was cleared. */ + read_vbnv_cmos(vbnv); + + if (__cmos_init(invalid)) + save_vbnv_cmos(vbnv); +} + +void cmos_init(bool invalid) +{ + if (IS_ENABLED(CONFIG_VBOOT_VBNV_CMOS)) + cmos_init_vbnv(invalid); + else + __cmos_init(invalid); } #endif /* __SMM__ */ diff --git a/src/soc/amd/stoneyridge/lpc.c b/src/soc/amd/stoneyridge/lpc.c index 75cedfe47f..7886433791 100644 --- a/src/soc/amd/stoneyridge/lpc.c +++ b/src/soc/amd/stoneyridge/lpc.c @@ -33,7 +33,6 @@ #include #include #include -#include static void lpc_init(device_t dev) { @@ -86,10 +85,7 @@ static void lpc_init(device_t dev) * update CMOS unless it is invalid. * 1 tells cmos_init to always initialize the CMOS. */ - if (IS_ENABLED(CONFIG_VBOOT_VBNV_CMOS)) - init_vbnv_cmos(0); - else - cmos_init(0); + cmos_init(0); /* Initialize i8259 pic */ setup_i8259(); diff --git a/src/soc/intel/broadwell/lpc.c b/src/soc/intel/broadwell/lpc.c index 4430e73b46..ac80cbeb0d 100644 --- a/src/soc/intel/broadwell/lpc.c +++ b/src/soc/intel/broadwell/lpc.c @@ -44,8 +44,6 @@ #include #include #include -#include -#include static void pch_enable_ioapic(struct device *dev) { @@ -193,10 +191,7 @@ static void pch_rtc_init(struct device *dev) printk(BIOS_DEBUG, "rtc_failed = 0x%x\n", rtc_failed); } - if (IS_ENABLED(CONFIG_VBOOT_VBNV_CMOS)) - init_vbnv_cmos(rtc_failed); - else - cmos_init(rtc_failed); + cmos_init(rtc_failed); } static const struct reg_script pch_misc_init_script[] = { diff --git a/src/soc/intel/common/block/rtc/rtc.c b/src/soc/intel/common/block/rtc/rtc.c index 04c07687db..9e76768e65 100644 --- a/src/soc/intel/common/block/rtc/rtc.c +++ b/src/soc/intel/common/block/rtc/rtc.c @@ -17,7 +17,6 @@ #include #include #include -#include /* RTC PCR configuration */ #define PCR_RTC_CONF 0x3400 @@ -39,14 +38,8 @@ __attribute__((weak)) int soc_get_rtc_failed(void) void rtc_init(void) { - int rtc_failed; - - rtc_failed = soc_get_rtc_failed(); /* Ensure the date is set including century byte. */ cmos_check_update_date(); - if (IS_ENABLED(CONFIG_VBOOT_VBNV_CMOS)) - init_vbnv_cmos(rtc_failed); - else - cmos_init(rtc_failed); + cmos_init(soc_get_rtc_failed()); } diff --git a/src/soc/intel/skylake/pmc.c b/src/soc/intel/skylake/pmc.c index f3a2681dd5..df08937739 100644 --- a/src/soc/intel/skylake/pmc.c +++ b/src/soc/intel/skylake/pmc.c @@ -36,8 +36,6 @@ #include #include #include -#include -#include static const struct reg_script pch_pmc_misc_init_script[] = { /* SLP_S4=4s, SLP_S3=50ms, disable SLP_X stretching after SUS loss. */ @@ -124,10 +122,7 @@ static void pch_rtc_init(void) /* Ensure the date is set including century byte. */ cmos_check_update_date(); - if (IS_ENABLED(CONFIG_VBOOT_VBNV_CMOS)) - init_vbnv_cmos(rtc_failed); - else - cmos_init(rtc_failed); + cmos_init(rtc_failed); } static void pch_power_options(void) diff --git a/src/southbridge/amd/pi/hudson/lpc.c b/src/southbridge/amd/pi/hudson/lpc.c index 282f17c1f1..da51cd042d 100644 --- a/src/southbridge/amd/pi/hudson/lpc.c +++ b/src/southbridge/amd/pi/hudson/lpc.c @@ -29,7 +29,6 @@ #include #include #include "hudson.h" -#include #include "pci_devs.h" static void lpc_init(device_t dev) @@ -78,10 +77,7 @@ static void lpc_init(device_t dev) * update CMOS unless it is invalid. * 1 tells cmos_init to always initialize the CMOS. */ - if (IS_ENABLED(CONFIG_VBOOT_VBNV_CMOS)) - init_vbnv_cmos(0); - else - cmos_init(0); + cmos_init(0); /* Initialize i8259 pic */ setup_i8259 (); diff --git a/src/vboot/vbnv.h b/src/vboot/vbnv.h index 30da6a50c5..7a0bf92f40 100644 --- a/src/vboot/vbnv.h +++ b/src/vboot/vbnv.h @@ -30,7 +30,6 @@ int vboot_wants_oprom(void); /* CMOS backend */ void read_vbnv_cmos(uint8_t *vbnv_copy); void save_vbnv_cmos(const uint8_t *vbnv_copy); -void init_vbnv_cmos(int rtc_fail); /* Flash backend */ void read_vbnv_flash(uint8_t *vbnv_copy); diff --git a/src/vboot/vbnv_cmos.c b/src/vboot/vbnv_cmos.c index b7ef3e767f..8bdcb31f9c 100644 --- a/src/vboot/vbnv_cmos.c +++ b/src/vboot/vbnv_cmos.c @@ -68,19 +68,6 @@ void save_vbnv_cmos(const uint8_t *vbnv_copy) cmos_write(vbnv_copy[i], CONFIG_VBOOT_VBNV_OFFSET + 14 + i); } -void init_vbnv_cmos(int rtc_fail) -{ - uint8_t vbnv[VBOOT_VBNV_BLOCK_SIZE]; - - if (rtc_fail) - read_vbnv_cmos(vbnv); - - cmos_init(rtc_fail); - - if (rtc_fail) - save_vbnv_cmos(vbnv); -} - #if IS_ENABLED(CONFIG_VBOOT_VBNV_CMOS_BACKUP_TO_FLASH) static void back_up_vbnv_cmos(void *unused) {