mb/google/guybrush/var/dewatt: update USB 2.0 Lane Parameter settings for USB ports
Tune the USB phy settings to update txpreempamptune to 3 and txvreftune to 6 for passing USB 2.0 SI Eye diagram measurement (port 0/1/4). BUG=b:199468920 TEST= emerge-guybrush coreboot; pass USB 2.0 SI Eye diagram measurement. Signed-off-by: Kenneth Chan <kenneth.chan@quanta.corp-partner.google.com> Change-Id: Ie46c9019186f1893d736fc2806ab74a4f1171be7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60239 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Rob Barnes <robbarnes@google.com>
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@ -18,6 +18,46 @@ chip soc/amd/cezanne
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register "telemetry_vddcrsocfull_scale_current_mA" = "30314" #mA
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register "telemetry_vddcrsocfull_scale_current_mA" = "30314" #mA
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register "telemetry_vddcrsocoffset" = "560"
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register "telemetry_vddcrsocoffset" = "560"
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#USB 2.0 phy config
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register "usb_phy" = "{
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/* Left USB C0 Port */
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.Usb2PhyPort[0] = {
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.compdstune = 3,
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.sqrxtune = 3,
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.txfslstune = 3,
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.txpreempamptune = 3,
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.txpreemppulsetune = 0,
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.txrisetune = 1,
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.txvreftune = 6,
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.txhsxvtune = 3,
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.txrestune = 1,
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},
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/* Left USB A0 Port */
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.Usb2PhyPort[1] = {
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.compdstune = 3,
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.sqrxtune = 3,
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.txfslstune = 3,
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.txpreempamptune = 3,
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.txpreemppulsetune = 0,
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.txrisetune = 1,
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.txvreftune = 6,
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.txhsxvtune = 3,
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.txrestune = 1,
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},
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/* Right USB C1 Port */
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.Usb2PhyPort[4] = {
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.compdstune = 3,
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.sqrxtune = 3,
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.txfslstune = 3,
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.txpreempamptune = 3,
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.txpreemppulsetune = 0,
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.txrisetune = 1,
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.txvreftune = 6,
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.txhsxvtune = 3,
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.txrestune = 1,
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},
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}"
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# I2C Config
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# I2C Config
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#+-------------------+---------------------------+
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#+-------------------+---------------------------+
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#| Field | Value |
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#| Field | Value |
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