GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Correct spelling of "spacing" (in comments). 

Signed-off-by: Jonathan Kollasch <jakllsch@kollasch.net>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5971 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Jonathan Kollasch 2010-10-19 13:39:38 +00:00 committed by Jonathan A. Kollasch
parent d208c1aa2c
commit 9fe5069584
1 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/northbridge/intel/i855/raminit.c
View File

@ -755,7 +755,7 @@ static void spd_set_dram_timing(const struct mem_controller *ctrl, uint8_t dimm_
*/ */
/* /*
* Back to Back Read-Write command spaceing (DDR, different Rows/Bank) * Back to Back Read-Write command spacing (DDR, different Rows/Bank)
*/ */
/* Set to a 3 clock back to back read to write turn around. /* Set to a 3 clock back to back read to write turn around.
* 2 is a good delay if the CAS latency is 2.0 */ * 2 is a good delay if the CAS latency is 2.0 */
@ -766,7 +766,7 @@ static void spd_set_dram_timing(const struct mem_controller *ctrl, uint8_t dimm_
dram_timing |= (1 << 28); // 3 clocks dram_timing |= (1 << 28); // 3 clocks
/* /*
* Back to Back Read-Write command spaceing (DDR, same or different Rows/Bank) * Back to Back Read-Write command spacing (DDR, same or different Rows/Bank)
*/ */
dram_timing &= ~(3 << 26); dram_timing &= ~(3 << 26);
if (current_cas_latency == DRT_CAS_2_0) if (current_cas_latency == DRT_CAS_2_0)