soc/intel/icelake: Update FSP UPDs if IGD is disable in devicetree
This patch sets required FSP UPDs to skip IGD initialziation if devicetree has disable IGD. Change-Id: I34a02bff112f922cabd48c23bc76370892ec62d9 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33739 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -80,9 +80,20 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
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mainboard_silicon_init_params(params);
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params->PeiGraphicsPeimInit = 1;
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params->GtFreqMax = 2;
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params->CdClock = 3;
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dev = pcidev_path_on_root(SA_DEVFN_IGD);
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if (!dev || !dev->enabled) {
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/*
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* Skip IGD initialization in FSP in case device is disabled
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* in the devicetree.cb.
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*/
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params->PeiGraphicsPeimInit = 0;
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} else {
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params->PeiGraphicsPeimInit = 1;
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params->GtFreqMax = 2;
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params->CdClock = 3;
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}
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/* Unlock upper 8 bytes of RTC RAM */
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params->PchLockDownRtcMemoryLock = 0;
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@ -25,11 +25,22 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg,
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const struct soc_intel_icelake_config *config)
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{
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unsigned int i;
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const struct device *dev;
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const struct device *dev = pcidev_path_on_root(SA_DEVFN_IGD);
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uint32_t mask = 0;
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/* Set IGD stolen size to 60MB. */
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m_cfg->IgdDvmt50PreAlloc = 0xFE;
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if (!dev || !dev->enabled) {
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/*
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* Skip IGD initialization in FSP if device
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* is disable in devicetree.cb.
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*/
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m_cfg->InternalGfx = 0;
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m_cfg->IgdDvmt50PreAlloc = 0;
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} else {
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m_cfg->InternalGfx = 1;
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/* Set IGD stolen size to 60MB. */
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m_cfg->IgdDvmt50PreAlloc = 0xFE;
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}
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m_cfg->TsegSize = CONFIG_SMM_TSEG_SIZE;
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m_cfg->IedSize = CONFIG_IED_REGION_SIZE;
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m_cfg->SaGv = config->SaGv;
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