soc/intel/icelake: Update FSP UPDs if IGD is disable in devicetree

This patch sets required FSP UPDs to skip IGD initialziation if
devicetree has disable IGD.

Change-Id: I34a02bff112f922cabd48c23bc76370892ec62d9
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33739
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/intel/icelake/fsp_params.c

@@ -80,9 +80,20 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
 
 	mainboard_silicon_init_params(params);
 
+	dev = pcidev_path_on_root(SA_DEVFN_IGD);
+
+	if (!dev || !dev->enabled) {
+		/*
+		 * Skip IGD initialization in FSP in case device is disabled
+		 * in the devicetree.cb.
+		 */
+		params->PeiGraphicsPeimInit = 0;
+	} else {
 		params->PeiGraphicsPeimInit = 1;
 		params->GtFreqMax = 2;
 		params->CdClock = 3;
+	}
+
 	/* Unlock upper 8 bytes of RTC RAM */
 	params->PchLockDownRtcMemoryLock = 0;
 

src/soc/intel/icelake/romstage/fsp_params.c

@@ -25,11 +25,22 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg,
 		const struct soc_intel_icelake_config *config)
 {
 	unsigned int i;
-	const struct device *dev;
+	const struct device *dev = pcidev_path_on_root(SA_DEVFN_IGD);
 	uint32_t mask = 0;
 
+	if (!dev || !dev->enabled) {
+		/*
+		 * Skip IGD initialization in FSP if device
+		 * is disable in devicetree.cb.
+		 */
+		m_cfg->InternalGfx = 0;
+		m_cfg->IgdDvmt50PreAlloc = 0;
+	} else {
+		m_cfg->InternalGfx = 1;
 		/* Set IGD stolen size to 60MB. */
 		m_cfg->IgdDvmt50PreAlloc = 0xFE;
+	}
+
 	m_cfg->TsegSize = CONFIG_SMM_TSEG_SIZE;
 	m_cfg->IedSize = CONFIG_IED_REGION_SIZE;
 	m_cfg->SaGv = config->SaGv;