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sb/intel/bd82x6x/lpc.c: configure CLKRUN_EN according to SKU 

CLKRUN_EN bit available for mobile is reserved on desktop SKUs.
PSEUDO_CLKRUN_EN bit available for desktop is reserved for mobile SKUs.
Configure these bits accordign to SKU.

Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I5295eb2bec27c77f800cc2ade9093e97ede47789
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40347
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
This commit is contained in:
Michał Żygowski 2020-04-13 20:37:36 +02:00 committed by Patrick Georgi
parent 5a73fc35e2
commit 9ff2af2b47
1 changed files with 7 additions and 1 deletions
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8
src/southbridge/intel/bd82x6x/lpc.c
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@ -20,6 +20,7 @@
#include "chip.h" #include "chip.h"
#include "pch.h" #include "pch.h"
#include "nvs.h" #include "nvs.h"
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <southbridge/intel/common/pciehp.h> #include <southbridge/intel/common/pciehp.h>
#include <southbridge/intel/common/acpi_pirq_gen.h> #include <southbridge/intel/common/acpi_pirq_gen.h>
#include <southbridge/intel/common/pmutil.h> #include <southbridge/intel/common/pmutil.h>
@ -373,7 +374,12 @@ static void enable_clock_gating(struct device *dev)
RCBA32_AND_OR(DMIC, ~0UL, 0xf); RCBA32_AND_OR(DMIC, ~0UL, 0xf);
reg16 = pci_read_config16(dev, GEN_PMCON_1); reg16 = pci_read_config16(dev, GEN_PMCON_1);
reg16 |= (1 << 2) | (1 << 11); reg16 &= ~(3 << 2); /* Clear CLKRUN bits for mobile and desktop */
if (get_platform_type() == PLATFORM_MOBILE)
reg16 |= (1 << 2); /* CLKRUN_EN for mobile */
else if (get_platform_type() == PLATFORM_DESKTOP_SERVER)
reg16 |= (1 << 3); /* PSEUDO_CLKRUN_EN for desktop */
reg16 |= (1 << 11);
pci_write_config16(dev, GEN_PMCON_1, reg16); pci_write_config16(dev, GEN_PMCON_1, reg16);
pch_iobp_update(0xEB007F07, ~0UL, (1 << 31)); pch_iobp_update(0xEB007F07, ~0UL, (1 << 31));