diff --git a/src/superio/fintek/f71805f/chip.h b/src/superio/fintek/f71805f/chip.h
new file mode 100644
index 0000000000..77bb9b92f7
--- /dev/null
+++ b/src/superio/fintek/f71805f/chip.h
@@ -0,0 +1,28 @@
+/*
+ * This file is part of the LinuxBIOS project.
+ *
+ * Copyright (C) 2007 Corey Osgood <corey@slightlyhackish.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+struct chip_operations;
+extern struct chip_operations superio_fintek_f71805f_ops;
+
+#include <uart8250.h>
+
+struct superio_fintek_f71805f_config {
+	struct uart8250 com1, com2;
+};
diff --git a/src/superio/fintek/f71805f/f71805f.h b/src/superio/fintek/f71805f/f71805f.h
new file mode 100644
index 0000000000..ed6b55e992
--- /dev/null
+++ b/src/superio/fintek/f71805f/f71805f.h
@@ -0,0 +1,29 @@
+/*
+ * This file is part of the LinuxBIOS project.
+ *
+ * Copyright (C) 2007 Corey Osgood <corey@slightlyhackish.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+/* Logical Device Numbers (LDN) */
+#define F71805F_FDC		0x00	/* Floppy */
+#define F71805F_SP1		0x01	/* UART1 */
+#define	F71805F_SP2		0x02	/* UART2 */
+#define F71805F_PP		0x03	/* Parallel Port */
+#define	F71805F_HWM		0x04	/* Hardware Monitor */
+#define	F71805F_GPIO		0x06	/* General Purpose I/O (GPIO) */
+#define	F71805F_PME		0x0A	/* Power Management Events (PME) */
+/* All others reserved */
diff --git a/src/superio/fintek/f71805f/f71805f_early_serial.c b/src/superio/fintek/f71805f/f71805f_early_serial.c
new file mode 100644
index 0000000000..708d05987c
--- /dev/null
+++ b/src/superio/fintek/f71805f/f71805f_early_serial.c
@@ -0,0 +1,44 @@
+/*
+ * This file is part of the LinuxBIOS project.
+ *
+ * Copyright (C) 2007 Corey Osgood <corey@slightlyhackish.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+/* Pre-RAM driver for Fintek F81705F Super I/O chip. */
+
+#include <arch/romcc_io.h>
+#include "f71805f.h"
+
+static inline void pnp_enter_conf_state(device_t dev) {
+	unsigned port = dev>>8;
+	outb(0x87, port);
+}
+
+static void pnp_exit_conf_state(device_t dev) {
+	unsigned port = dev>>8;
+	outb(0xaa, port);
+}
+
+static void f71805f_enable_serial(device_t dev, unsigned iobase)
+{
+	pnp_enter_conf_state(dev);
+	pnp_set_logical_device(dev);
+	pnp_set_enable(dev, 0);
+	pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
+	pnp_set_enable(dev, 1);
+	pnp_exit_conf_state(dev);
+}