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mb/google/{beltino,jecht}: Drop SIO configuration lines 

These are meaningless for boards without SIO devices.

Change-Id: I252bba6ff1a2547fd0661ad3076470376e95bdd6
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38032
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Nico Huber 2019-12-31 15:52:14 +01:00 committed by Matt DeVillier
parent 73be5f7211
commit a0259b4273
2 changed files with 0 additions and 8 deletions
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4
src/mainboard/google/beltino/devicetree.cb
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@ -55,10 +55,6 @@ chip northbridge/intel/haswell
register "sata_port_map" = "0x1" register "sata_port_map" = "0x1"
register "sata_devslp_disable" = "0x1" register "sata_devslp_disable" = "0x1"
register "sio_acpi_mode" = "0"
register "sio_i2c0_voltage" = "0" # 3.3V
register "sio_i2c1_voltage" = "0" # 3.3V
# Force enable ASPM for PCIe Port 4 # Force enable ASPM for PCIe Port 4
register "pcie_port_force_aspm" = "0x10" register "pcie_port_force_aspm" = "0x10"

4
src/mainboard/google/jecht/devicetree.cb
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@ -30,10 +30,6 @@ chip soc/intel/broadwell
register "sata_port_map" = "0x1" register "sata_port_map" = "0x1"
register "sata_devslp_disable" = "0x1" register "sata_devslp_disable" = "0x1"
register "sio_acpi_mode" = "0"
register "sio_i2c0_voltage" = "0" # 3.3V
register "sio_i2c1_voltage" = "0" # 3.3V
# Force enable ASPM for PCIe Port 4 # Force enable ASPM for PCIe Port 4
register "pcie_port_force_aspm" = "0x10" register "pcie_port_force_aspm" = "0x10"