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cpu/intel/microcode: allow microcode to be loaded in romstage 

The previous usage of the intel microcode support supported using
the library under ROMCC and ramstage. Allow for microcode support
to be used in normal C-based romstage as well by:

1. Only using walkcbfs when ROMCC is defined.
2. Only using spinlocks if !__PRE_RAM__

The header file now unconditionally exposes the declarations
of the supporting functions.

Change-Id: I903578bcb4422b4c050903c53b60372b64b79af1
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/13611
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Aaron Durbin 2016-02-05 14:58:06 -06:00
parent 5a70d6bdf2
commit a02bb653fd
3 changed files with 7 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
src/cpu/intel/microcode/Makefile.inc
View File

@ -3,3 +3,4 @@
## directly from CBFS. You have been WARNED!!! ## directly from CBFS. You have been WARNED!!!
################################################################################ ################################################################################
ramstage-$(CONFIG_SUPPORT_CPU_UCODE_IN_CBFS) += microcode.c ramstage-$(CONFIG_SUPPORT_CPU_UCODE_IN_CBFS) += microcode.c
romstage-$(CONFIG_SUPPORT_CPU_UCODE_IN_CBFS) += microcode.c

8
src/cpu/intel/microcode/microcode.c
View File

@ -19,7 +19,10 @@
#include <stdint.h> #include <stdint.h>
#include <stddef.h> #include <stddef.h>
#if !defined(__ROMCC__) #if !defined(__ROMCC__)
#include <cbfs.h>
#include <console/console.h> #include <console/console.h>
#else
#include <arch/cbfs.h>
#endif #endif
#include <cpu/cpu.h> #include <cpu/cpu.h>
#include <cpu/x86/msr.h> #include <cpu/x86/msr.h>
@ -27,11 +30,8 @@
#include <rules.h> #include <rules.h>
#if !defined(__PRE_RAM__) #if !defined(__PRE_RAM__)
#include <cbfs.h>
#include <smp/spinlock.h> #include <smp/spinlock.h>
DECLARE_SPIN_LOCK(microcode_lock) DECLARE_SPIN_LOCK(microcode_lock)
#else
#include <arch/cbfs.h>
#endif #endif
struct microcode { struct microcode {
@ -121,7 +121,7 @@ const void *intel_microcode_find(void)
unsigned int x86_model, x86_family; unsigned int x86_model, x86_family;
msr_t msr; msr_t msr;
#ifdef __PRE_RAM__ #ifdef __ROMCC__
struct cbfs_file *microcode_file; struct cbfs_file *microcode_file;
microcode_file = walkcbfs_head((char *) MICROCODE_CBFS_FILE); microcode_file = walkcbfs_head((char *) MICROCODE_CBFS_FILE);

4
src/include/cpu/intel/microcode.h
View File

@ -16,7 +16,8 @@
#ifndef __CPU__INTEL__MICROCODE__ #ifndef __CPU__INTEL__MICROCODE__
#define __CPU__INTEL__MICROCODE__ #define __CPU__INTEL__MICROCODE__
#ifndef __PRE_RAM__ #include <stdint.h>
void intel_update_microcode_from_cbfs(void); void intel_update_microcode_from_cbfs(void);
/* Find a microcode that matches the revision and platform family returning /* Find a microcode that matches the revision and platform family returning
* NULL if none found. */ * NULL if none found. */
@ -29,6 +30,5 @@ void intel_microcode_load_unlocked(const void *microcode_patch);
/* SoC specific check to determine if microcode update is really /* SoC specific check to determine if microcode update is really
* required, will skip microcode update if true. */ * required, will skip microcode update if true. */
int soc_skip_ucode_update(u32 currrent_patch_id, u32 new_patch_id); int soc_skip_ucode_update(u32 currrent_patch_id, u32 new_patch_id);
#endif
#endif #endif