From a08f509cc537e3608a41930592a6cb9ea81df6ab Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Sat, 26 Jun 2021 14:28:42 +0300 Subject: [PATCH] soc/nvidia/tegra124: Do resource transition MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I422ece7b64bf81bcc75a414fd27f15ec330d40be Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/55919 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held --- src/soc/nvidia/tegra124/soc.c | 13 ++++--------- 1 file changed, 4 insertions(+), 9 deletions(-) diff --git a/src/soc/nvidia/tegra124/soc.c b/src/soc/nvidia/tegra124/soc.c index 914a569752..95f62a3545 100644 --- a/src/soc/nvidia/tegra124/soc.c +++ b/src/soc/nvidia/tegra124/soc.c @@ -19,16 +19,11 @@ static void soc_read_resources(struct device *dev) u32 lcdbase = fb_base_mb(); unsigned long fb_size = FB_SIZE_MB; - ram_resource_kb(dev, 0, (uintptr_t)_dram/KiB, - (sdram_max_addressable_mb() - fb_size)*KiB - - (uintptr_t)_dram/KiB); - mmio_resource_kb(dev, 1, lcdbase*KiB, fb_size*KiB); + ram_from_to(dev, 0, (uintptr_t)_dram, (sdram_max_addressable_mb() - fb_size) * MiB); + mmio_range(dev, 1, lcdbase * MiB, fb_size * MiB); - u32 sdram_end_mb = sdram_size_mb() + (uintptr_t)_dram/MiB; - - if (sdram_end_mb > sdram_max_addressable_mb()) - ram_resource_kb(dev, 2, sdram_max_addressable_mb()*KiB, - (sdram_end_mb - sdram_max_addressable_mb())*KiB); + ram_from_to(dev, 2, sdram_max_addressable_mb() * MiB, + (uintptr_t)_dram + sdram_size_mb() * (uint64_t)MiB); } static void soc_init(struct device *dev)