get ts5300 compiling, it's mostly a copy of msm586seg
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2130 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer
parent
648e8da0c2
commit
a09ab6dc53
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@ -30,6 +30,8 @@ static void memreset(int controllers, const struct mem_controller *ctrl)
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{
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}
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static inline void activate_spd_rom(const struct mem_controller *ctrl)
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{
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/* nothing to do */
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@ -59,6 +61,102 @@ static inline void dumpmem(void){
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}
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}
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static inline void irqinit(void){
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volatile unsigned char *cp;
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#if 0
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/* these values taken from the msm board itself.
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* and they cause the board to not even come out of calibrating_delay_loop
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* if you can believe it. Our problem right now is no IDE or serial interrupts
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* So we'll try to put interrupts in, one at a time. IDE first.
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*/
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cp = (volatile unsigned char *) 0xfffefd00;
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*cp = 0x11;
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cp = (volatile unsigned char *) 0xfffefd02;
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*cp = 0x02;
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cp = (volatile unsigned char *) 0xfffefd03;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd04;
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*cp = 0xf7;
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cp = (volatile unsigned char *) 0xfffefd08;
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*cp = 0xf7;
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cp = (volatile unsigned char *) 0xfffefd0a;
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*cp = 0x8b;
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cp = (volatile unsigned char *) 0xfffefd10;
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*cp = 0x18;
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cp = (volatile unsigned char *) 0xfffefd14;
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*cp = 0x09;
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cp = (volatile unsigned char *) 0xfffefd18;
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*cp = 0x88;
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cp = (volatile unsigned char *) 0xfffefd1a;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd1b;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd1c;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd20;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd21;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd22;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd28;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd29;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd30;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd31;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd32;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd33;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd40;
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*cp = 0x10;
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cp = (volatile unsigned char *) 0xfffefd41;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd42;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd43;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd44;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd45;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd46;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd50;
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*cp = 0x37;
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cp = (volatile unsigned char *) 0xfffefd51;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd52;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd53;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd54;
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*cp = 0x37;
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cp = (volatile unsigned char *) 0xfffefd55;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd56;
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*cp = 0x37;
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cp = (volatile unsigned char *) 0xfffefd57;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd58;
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*cp = 0xff;
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cp = (volatile unsigned char *) 0xfffefd59;
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*cp = 0xff;
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cp = (volatile unsigned char *) 0xfffefd5a;
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*cp = 0xff;
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#endif
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#if 0
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/* this fails too */
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/* IDE only ... */
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cp = (volatile unsigned char *) 0xfffefd56;
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*cp = 0xe;
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#endif
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}
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static void main(unsigned long bist)
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{
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volatile int i;
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@ -67,6 +165,7 @@ static void main(unsigned long bist)
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setupsc520();
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irqinit();
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uart_init();
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console_init();
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for(i = 0; i < 100; i++)
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@ -117,11 +216,11 @@ static void main(unsigned long bist)
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// Check 32MB of memory @ 0
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ram_check(0x00000000, 0x02000000);
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#endif
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#if 0
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#if 1
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{
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volatile unsigned char *src = (unsigned char *) 0x2000000 + 0x70000;
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volatile unsigned char *src = (unsigned char *) 0x2000000 + 0x60000;
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volatile unsigned char *dst = (unsigned char *) 0x4000;
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for(i = 0; i < 0x10000; i++) {
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for(i = 0; i < 0x20000; i++) {
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/*
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print_err("Set dst "); print_err_hex32((unsigned long) dst);
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print_err(" to "); print_err_hex32(*src); print_err("\r\n");
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@ -1,128 +0,0 @@
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static void print_debug_pci_dev(unsigned dev)
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{
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print_debug("PCI: ");
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print_debug_hex8((dev >> 16) & 0xff);
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print_debug_char(':');
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print_debug_hex8((dev >> 11) & 0x1f);
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print_debug_char('.');
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print_debug_hex8((dev >> 8) & 7);
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}
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static void print_pci_devices(void)
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{
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device_t dev;
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for(dev = PCI_DEV(0, 0, 0);
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dev <= PCI_DEV(0, 0x1f, 0x7);
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dev += PCI_DEV(0,0,1)) {
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uint32_t id;
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id = pci_read_config32(dev, PCI_VENDOR_ID);
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if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
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(((id >> 16) & 0xffff) == 0xffff) ||
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(((id >> 16) & 0xffff) == 0x0000)) {
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continue;
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}
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print_debug_pci_dev(dev);
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print_debug("\r\n");
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}
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}
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static void dump_pci_device(unsigned dev)
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{
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int i;
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print_debug_pci_dev(dev);
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print_debug("\r\n");
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for(i = 0; i <= 255; i++) {
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unsigned char val;
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if ((i & 0x0f) == 0) {
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print_debug_hex8(i);
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print_debug_char(':');
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}
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val = pci_read_config8(dev, i);
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print_debug_char(' ');
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print_debug_hex8(val);
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if ((i & 0x0f) == 0x0f) {
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print_debug("\r\n");
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}
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}
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}
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static void dump_pci_devices(void)
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{
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device_t dev;
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for(dev = PCI_DEV(0, 0, 0);
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dev <= PCI_DEV(0, 0x1f, 0x7);
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dev += PCI_DEV(0,0,1)) {
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uint32_t id;
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id = pci_read_config32(dev, PCI_VENDOR_ID);
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if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
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(((id >> 16) & 0xffff) == 0xffff) ||
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(((id >> 16) & 0xffff) == 0x0000)) {
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continue;
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}
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dump_pci_device(dev);
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}
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}
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#if 0
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static void dump_spd_registers(const struct mem_controller *ctrl)
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{
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int i;
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print_debug("\r\n");
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for(i = 0; i < 4; i++) {
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unsigned device;
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device = ctrl->channel0[i];
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if (device) {
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int j;
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print_debug("dimm: ");
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print_debug_hex8(i);
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print_debug(".0: ");
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print_debug_hex8(device);
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for(j = 0; j < 256; j++) {
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int status;
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unsigned char byte;
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if ((j & 0xf) == 0) {
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print_debug("\r\n");
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print_debug_hex8(j);
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print_debug(": ");
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}
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status = smbus_read_byte(device, j);
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if (status < 0) {
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print_debug("bad device\r\n");
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break;
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}
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byte = status & 0xff;
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print_debug_hex8(byte);
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print_debug_char(' ');
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}
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print_debug("\r\n");
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}
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device = ctrl->channel1[i];
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if (device) {
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int j;
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print_debug("dimm: ");
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print_debug_hex8(i);
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print_debug(".1: ");
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print_debug_hex8(device);
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for(j = 0; j < 256; j++) {
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int status;
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unsigned char byte;
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if ((j & 0xf) == 0) {
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print_debug("\r\n");
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print_debug_hex8(j);
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print_debug(": ");
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}
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status = smbus_read_byte(device, j);
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if (status < 0) {
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print_debug("bad device\r\n");
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break;
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}
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byte = status & 0xff;
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print_debug_hex8(byte);
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print_debug_char(' ');
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}
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print_debug("\r\n");
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}
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}
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}
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#endif
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@ -5,25 +5,28 @@
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#include <arch/io.h>
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#include "arch/romcc_io.h"
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#include "pc80/mc146818rtc_early.c"
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#include "cpu/p6/boot_cpu.c"
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static void main(void)
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static unsigned long main(unsigned long bist)
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{
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/* for now, just always assume failure */
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#if 0
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/* Is this a cpu reset? */
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if (cpu_init_detected()) {
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if (last_boot_normal()) {
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asm("jmp __normal_image");
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} else {
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asm("jmp __cpu_reset");
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}
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}
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/* This is the primary cpu how should I boot? */
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else if (do_normal_boot()) {
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asm("jmp __normal_image");
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if (do_normal_boot()) {
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goto normal_image;
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}
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#endif
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else {
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goto fallback_image;
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}
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normal_image:
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asm volatile ("jmp __normal_image"
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: /* outputs */
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: "a" (bist) /* inputs */
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: /* clobbers */
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);
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cpu_reset:
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asm volatile ("jmp __cpu_reset"
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: /* outputs */
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: "a"(bist) /* inputs */
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: /* clobbers */
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);
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fallback_image:
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return bist;
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}
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@ -1,29 +1,28 @@
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// This pirq table is dummy and only here for existance.
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// It MUST be replaced as soon as LinuxBIOS is operable on this board.
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/* This file was generated by getpir.c, do not modify!
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(but if you do, please run checkpir on it to verify)
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* Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up
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*
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* Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM
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*/
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#include <arch/pirq_routing.h>
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const struct irq_routing_table intel_irq_routing_table = {
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PIRQ_SIGNATURE, /* u32 signature */
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PIRQ_VERSION, /* u16 version */
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32+16*5, /* there can be total 5 devices on the bus */
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0, /* Where the interrupt router lies (bus) */
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0x88, /* Where the interrupt router lies (dev) */
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0x1c20, /* IRQs devoted exclusively to PCI usage */
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0x1106, /* Vendor */
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0x8231, /* Device */
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0, /* Crap (miniport) */
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PIRQ_SIGNATURE, /* u32 signature */
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PIRQ_VERSION, /* u16 version */
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32+16*7, /* there can be total 7 devices on the bus */
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0x00, /* Where the interrupt router lies (bus) */
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(0x00<<3)|0x0, /* Where the interrupt router lies (dev) */
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0, /* IRQs devoted exclusively to PCI usage */
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0x8086, /* Vendor */
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0x122e, /* Device */
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0, /* Crap (miniport) */
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{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
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0x5e, /* u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */
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0x50, /* u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */
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{
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/* 8231 ethernet */
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{0,0x90, {{0x1, 0xdeb8}, {0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xdeb8}}, 0x1, 0},
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/* 8231 internal */
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{0,0x88, {{0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xdeb8}, {0x1, 0xdeb8}}, 0x2, 0},
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/* PCI slot */
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{0,0xa0, {{0x3, 0xdeb8}, {0x4, 0xdeb8}, {0x1, 0xdeb8}, {0x2, 0xdeb8}}, 0, 0},
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{0,0x50, {{0x4, 0xdeb8}, {0x3, 0xdeb8}, {0x2, 0xdeb8}, {0x1, 0xdeb8}}, 0x3, 0},
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{0,0x98, {{0x4, 0xdeb8}, {0x3, 0xdeb8}, {0x2, 0xdeb8}, {0x1, 0xdeb8}}, 0x4, 0},
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/* bus, dev|fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
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{0x00,(0x12<<3)|0x0, {{0x30, 0x8000}, {0x00, 0x0}, {0x00, 0x0}, {0x00, 0x00}}, 0x0, 0x0},
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{0x00,(0x14<<3)|0x0, {{0x30, 0x8000}, {0x31, 0x0}, {0x32, 0x0}, {0x33, 0x00}}, 0x0, 0x0},
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}
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};
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unsigned long write_pirq_routing_table(unsigned long addr)
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@ -0,0 +1,31 @@
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target technologic_ts5300
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mainboard technologic/ts5300
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option DEFAULT_CONSOLE_LOGLEVEL=10
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option MAXIMUM_CONSOLE_LOGLEVEL=10
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option CONFIG_COMPRESS=0
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option CONFIG_CONSOLE_VGA=1
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#romimage "normal"
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# option USE_FALLBACK_IMAGE=0
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# option ROM_IMAGE_SIZE=0x10000
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# option LINUXBIOS_EXTRA_VERSION=".0Normal"
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# payload /etc/hosts
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#end
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romimage "fallback"
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option FALLBACK_SIZE = 256 * 1024
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# option ROM_SIZE=512*1024
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# option ROM_SECTION_SIZE=512*1024
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option USE_FALLBACK_IMAGE=1
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# option ROM_IMAGE_SIZE=32 * 1024 # 0x8000
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option ROM_IMAGE_SIZE=128 * 1024 # 0x10000
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# option ROM_IMAGE_SIZE=512 * 1024 # 0x10000
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option LINUXBIOS_EXTRA_VERSION=".0Fallback"
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payload /dev/null
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end
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buildrom ./linuxbios.rom ROM_SIZE "fallback"
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