Includes fix from Craig C Forney
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1452 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -924,7 +924,7 @@ static void set_dimm_size(const struct mem_controller *ctrl, struct dimm_size sz
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sz.side2 = 0;
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sz.side2 = 0;
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}
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}
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map = pci_read_config32(ctrl->f2, DRAM_BANK_ADDR_MAP);
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map = pci_read_config32(ctrl->f2, DRAM_BANK_ADDR_MAP);
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map &= ~(0xf << (index + 4));
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map &= ~(0xf << (index * 4));
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/* For each base register.
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/* For each base register.
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* Place the dimm size in 32 MB quantities in the bits 31 - 21.
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* Place the dimm size in 32 MB quantities in the bits 31 - 21.
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