mb/intel/kunimitsu: Make use of the chipset devicetree
Use the references from the chipset devicetree as this makes the comments superfluous and remove devices which are turned off. Change-Id: I413a3630bda841ae9ed6c4a584d2250a81c28308 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79039 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <ericllai@google.com>
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@ -163,21 +163,19 @@ chip soc/intel/skylake
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device cpu_cluster 0 on end
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device domain 0 on
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device pci 00.0 on end # Host Bridge
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device pci 02.0 on end # Integrated Graphics Device
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device pci 04.0 on end # SA thermal subsystem
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device pci 14.0 on end # USB xHCI
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device pci 14.1 off end # USB xDCI (OTG)
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device pci 14.2 on end # Thermal Subsystem
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device pci 15.0 on
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device ref igpu on end
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device ref sa_thermal on end
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device ref south_xhci on end
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device ref thermal on end
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device ref i2c0 on
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chip drivers/i2c/generic
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register "hid" = ""ELAN0001""
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register "desc" = ""ELAN Touchscreen""
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register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_E7_IRQ)"
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device i2c 10 on end
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end
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end # I2C #0
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device pci 15.1 on
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end
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device ref i2c1 on
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chip drivers/i2c/generic
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register "hid" = ""ELAN0000""
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register "desc" = ""ELAN Touchpad""
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@ -185,18 +183,10 @@ chip soc/intel/skylake
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register "wake" = "GPE0_DW0_05"
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device i2c 15 on end
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end
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end # I2C #1
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device pci 15.2 off end # I2C #2
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device pci 15.3 off end # I2C #3
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device pci 16.0 on end # Management Engine Interface 1
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device pci 16.1 off end # Management Engine Interface 2
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device pci 16.2 off end # Management Engine IDE-R
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device pci 16.3 off end # Management Engine KT Redirection
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device pci 16.4 off end # Management Engine Interface 3
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device pci 17.0 off end # SATA
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device pci 19.0 on end # UART #2
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device pci 19.1 off end # I2C #5
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device pci 19.2 on
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end
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device ref heci1 on end
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device ref uart2 on end
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device ref i2c4 on
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chip drivers/i2c/nau8825
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register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_F10_IRQ)"
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register "jkdet_enable" = "1"
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@ -233,42 +223,26 @@ chip soc/intel/skylake
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register "device_present_gpio" = "GPP_E3"
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device i2c 35 on end
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end
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end # I2C #4
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device pci 1c.0 on
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end
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device ref pcie_rp1 on
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chip drivers/wifi/generic
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register "wake" = "GPE0_DW0_16"
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device pci 00.0 on end
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end
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end # PCI Express Port 1
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device pci 1c.1 off end # PCI Express Port 2
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device pci 1c.2 off end # PCI Express Port 3
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device pci 1c.3 off end # PCI Express Port 4
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device pci 1c.4 on end # PCI Express Port 5
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device pci 1c.5 off end # PCI Express Port 6
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device pci 1c.6 off end # PCI Express Port 7
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device pci 1c.7 off end # PCI Express Port 8
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device pci 1d.0 off end # PCI Express Port 9
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device pci 1d.1 off end # PCI Express Port 10
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device pci 1d.2 off end # PCI Express Port 11
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device pci 1d.3 off end # PCI Express Port 12
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device pci 1e.0 on end # UART #0
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device pci 1e.1 off end # UART #1
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device pci 1e.2 off end # GSPI #0
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device pci 1e.3 off end # GSPI #1
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device pci 1e.4 on end # eMMC
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device pci 1e.5 off end # SDIO
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device pci 1e.6 on end # SDCard
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device pci 1f.0 on
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end
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device ref pcie_rp5 on end
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device ref uart0 on end
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device ref emmc on end
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device ref sdxc on end
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device ref lpc_espi on
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chip drivers/pc80/tpm
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device pnp 0c31.0 on end
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end
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chip ec/google/chromeec
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device pnp 0c09.0 on end
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end
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end # LPC Interface
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device pci 1f.1 on end # P2SB
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device pci 1f.2 on end # Power Management Controller
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device pci 1f.3 on
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end
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device ref hda on
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chip drivers/generic/max98357a
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register "hid" = ""MX98357A""
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register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E3)"
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@ -276,9 +250,8 @@ chip soc/intel/skylake
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register "device_present_gpio_invert" = "1"
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device generic 0 on end
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end
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end # Intel HDA
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device pci 1f.4 on end # SMBus
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device pci 1f.5 on end # PCH SPI
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device pci 1f.6 off end # GbE
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end
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device ref smbus on end
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device ref fast_spi on end
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end
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end
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