GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mb/lenovo/w520/devicetree: Use subsystemid inheritance 

Change-Id: If7816992e717b4da585b16e5bbe67610c9af867d
Signed-off-by: Peter Lemenkov <lemenkov@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37294
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
This commit is contained in:
Peter Lemenkov 2019-11-27 15:15:27 +01:00 committed by Patrick Georgi
parent 2ee6fbf0d7
commit a0c97590b9
1 changed files with 10 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
src/mainboard/lenovo/t520/variants/w520/devicetree.cb
View File

@ -37,9 +37,13 @@ chip northbridge/intel/sandybridge
register "pci_mmio_size" = "2048" register "pci_mmio_size" = "2048"
device domain 0 on device domain 0 on
subsystemid 0x17aa 0x21cf inherit
device pci 00.0 on end # host bridge device pci 00.0 on end # host bridge
device pci 01.0 on end # NVIDIA Corporation GF119M [NVS 4200M] device pci 01.0 on end # NVIDIA Corporation GF119M [NVS 4200M]
device pci 02.0 on end # vga controller device pci 02.0 on
subsystemid 0x17aa 0x21d1
end # vga controller
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# GPI routing # GPI routing
@ -73,7 +77,9 @@ chip northbridge/intel/sandybridge
device pci 16.1 off end device pci 16.1 off end
device pci 16.2 off end device pci 16.2 off end
device pci 16.3 off end device pci 16.3 off end
device pci 19.0 on end # Intel Gigabit Ethernet device pci 19.0 on # Intel Gigabit Ethernet
subsystemid 0x17aa 0x21ce
end
device pci 1a.0 on end # USB2 EHCI #2 device pci 1a.0 on end # USB2 EHCI #2
device pci 1b.0 on end # High Definition Audio device pci 1b.0 on end # High Definition Audio
device pci 1c.0 off end # PCIe Port #1 device pci 1c.0 off end # PCIe Port #1
@ -87,10 +93,10 @@ chip northbridge/intel/sandybridge
device pci 1c.6 on end # PCIe Port #7 USB 3.0 only W520 device pci 1c.6 on end # PCIe Port #7 USB 3.0 only W520
device pci 1c.7 off end # PCIe Port #8 device pci 1c.7 off end # PCIe Port #8
device pci 1d.0 on end # USB2 EHCI #1 device pci 1d.0 on end # USB2 EHCI #1
device pci 1f.0 on #LPC bridge device pci 1f.0 on #LPC bridge
chip ec/lenovo/pmh7 chip ec/lenovo/pmh7
device pnp ff.1 on # dummy device pnp ff.1 on end # dummy
end
register "backlight_enable" = "0x01" register "backlight_enable" = "0x01"
register "dock_event_enable" = "0x01" register "dock_event_enable" = "0x01"
end end