From a0ca786a6ea72a3cac2f880bb1d099e3034cbca7 Mon Sep 17 00:00:00 2001 From: Francois Toguo Date: Mon, 8 Mar 2021 14:53:51 -0800 Subject: [PATCH] mb/intel/adlrvp: Update iDisp Link UPD settings This changes updates the iDisp-Link T-mode to 8T required for ADL-M. The update is made because the HW on ADL now supports 8T mode. BUG=None TEST= build and boot ADL-M RVP and verify HDMI/DP audio playback. Signed-off-by: Francois Toguo Change-Id: I9d0bf7dc76348f7e184e8496f042badc30bf3211 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51353 Reviewed-by: Furquan Shaikh Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- src/mainboard/intel/adlrvp/devicetree_m.cb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mainboard/intel/adlrvp/devicetree_m.cb b/src/mainboard/intel/adlrvp/devicetree_m.cb index 3094010584..7c691638c7 100644 --- a/src/mainboard/intel/adlrvp/devicetree_m.cb +++ b/src/mainboard/intel/adlrvp/devicetree_m.cb @@ -130,7 +130,7 @@ chip soc/intel/alderlake register "PchHdaAudioLinkSndwEnable[0]" = "1" register "PchHdaAudioLinkSndwEnable[1]" = "1" # iDisp-Link T-Mode 0: 2T, 2: 4T, 3: 8T, 4: 16T - register "PchHdaIDispLinkTmode" = "2" + register "PchHdaIDispLinkTmode" = "3" # iDisp-Link Freq 4: 96MHz, 3: 48MHz. register "PchHdaIDispLinkFrequency" = "4" # Not disconnected/enumerable