mb/google/asurada: Load dram params from sdram config

Signed-off-by: Huayang Duan <huayang.duan@mediatek.com>
Change-Id: I2cc38115c27cbbe157fc850bbd88b10ae8001f52
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44567
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>

src/mainboard/google/asurada/Makefile.inc

@@ -1,3 +1,5 @@
+subdirs-y += sdram_params/
+
 bootblock-y += memlayout.ld
 bootblock-y += bootblock.c
 
@@ -6,6 +8,7 @@ verstage-y += reset.c
 
 romstage-y += memlayout.ld
 romstage-y += boardid.c
+romstage-y += sdram_configs.c
 
 ramstage-y += memlayout.ld
 ramstage-y += boardid.c

src/mainboard/google/asurada/sdram_configs.c

@@ -0,0 +1,25 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <boardid.h>
+#include <cbfs.h>
+#include <console/console.h>
+#include <soc/dramc_param.h>
+
+static const char *const sdram_configs[] = {
+	[0] = "sdram-lpddr4x-MT29VZZZBD9DQKPR-046-6GB",
+	[1] = "sdram-lpddr4x-MT29VZZZAD8GQFSL-046-4GB",
+};
+
+static struct sdram_info params;
+
+const struct sdram_info *get_sdram_config(void)
+{
+	uint32_t ramcode = ram_code();
+
+	if (ramcode >= ARRAY_SIZE(sdram_configs) ||
+	    cbfs_boot_load_file(sdram_configs[ramcode], &params, sizeof(params),
+				CBFS_TYPE_STRUCT) != sizeof(params))
+		die("Cannot load SDRAM parameter file for RAM code: %#x", ramcode);
+
+	return &params;
+}

src/mainboard/google/asurada/sdram_params/Makefile.inc

@@ -0,0 +1,10 @@
+sdram-params :=
+sdram-params += sdram-lpddr4x-MT29VZZZBD9DQKPR-046-6GB
+sdram-params += sdram-lpddr4x-MT29VZZZAD8GQFSL-046-4GB
+
+$(foreach params,$(sdram-params), \
+	$(eval cbfs-files-y += $(params)) \
+	$(eval $(params)-file := $(params).c:struct) \
+	$(eval $(params)-type := struct) \
+	$(eval $(params)-compression := $(CBFS_COMPRESS_FLAG)) \
+)

src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-MT29VZZZAD8GQFSL-046-4GB.c

@@ -0,0 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <soc/dramc_param.h>
+
+struct sdram_info params = {
+	.ddr_geometry = DDR_TYPE_2CH_1RK_4GB_4_0,
+};

src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-MT29VZZZBD9DQKPR-046-6GB.c

@@ -0,0 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <soc/dramc_param.h>
+
+struct sdram_info params = {
+	.ddr_geometry = DDR_TYPE_2CH_2RK_6GB_3_3,
+};