GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

google/pyro: Set PL2 override to 15000mW 

This patch sets PL2 override value to 15W in RAPL registers
and sets DPTF PL2 Max to 15W

BUG=none
BRANCH=reef
TEST=emerge-pyro coreboot
Change-Id: Ibadf0fa442f556d018c249b1cf88e29c4d57c97f
Signed-off-by: Kevin Chiu <Kevin.Chiu@quantatw.com>
Reviewed-on: https://review.coreboot.org/17779
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Kevin Chiu 2016-12-09 11:42:05 +08:00 committed by Martin Roth
parent 8d49d52ae9
commit a0f6f9bdbc
2 changed files with 3 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/mainboard/google/reef/variants/pyro/devicetree.cb
View File

@ -53,6 +53,8 @@ chip soc/intel/apollolake
# current VR solution. Experiments show that SoC TDP max (6W) can # current VR solution. Experiments show that SoC TDP max (6W) can
# be reached when RAPL PL1 is set to 12W. # be reached when RAPL PL1 is set to 12W.
register "tdp_pl1_override_mw" = "12000" register "tdp_pl1_override_mw" = "12000"
# Set RAPL PL2 to 15W.
register "tdp_pl2_override_mw" = "15000"
# Enable Audio Clock and Power gating # Enable Audio Clock and Power gating
register "hdaudio_clk_gate_enable" = "1" register "hdaudio_clk_gate_enable" = "1"

2
src/mainboard/google/reef/variants/pyro/include/variant/acpi/dptf.asl
View File

@ -81,7 +81,7 @@ Name (MPPC, Package ()
Package () { /* Power Limit 2 */ Package () { /* Power Limit 2 */
1, /* PowerLimitIndex, 1 for Power Limit 2 */ 1, /* PowerLimitIndex, 1 for Power Limit 2 */
6000, /* PowerLimitMinimum */ 6000, /* PowerLimitMinimum */
8000, /* PowerLimitMaximum */ 15000, /* PowerLimitMaximum */
1000, /* TimeWindowMinimum */ 1000, /* TimeWindowMinimum */
1000, /* TimeWindowMaximum */ 1000, /* TimeWindowMaximum */
1000 /* StepSize */ 1000 /* StepSize */