arch/x86: Make postcar TempRamExit call generic

Move the FSP-specific call for tearing down cache-as-RAM out of
postcar.c and replace it with an empty weak function.

This patch omits checking if (IS_ENABLED(CONFIG_FSP_CAR)).  The
temp_ram_exit.c file with the real fsp_temp_ram_exit() is only built
when CONFIG_FSP_CAR is true.

Change-Id: I9adbb1f2a7b2ff50d9f36d5a3640f63410c09479
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/20965
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Marshall Dawson 2017-08-10 15:17:26 -06:00 committed by Aaron Durbin
parent d0269a636d
commit a102a029c5
3 changed files with 20 additions and 4 deletions

View File

@ -297,6 +297,13 @@ void *postcar_commit_mtrrs(struct postcar_frame *pcf);
* utilizes prog_run() internally.
*/
void run_postcar_phase(struct postcar_frame *pcf);
/*
* Systems without a native coreboot cache-as-ram teardown may implement
* this to use an alternate method.
*/
void late_car_teardown(void);
#endif
#endif /* ARCH_CPU_H */

View File

@ -13,18 +13,22 @@
* GNU General Public License for more details.
*/
#include <arch/cpu.h>
#include <cbmem.h>
#include <console/console.h>
#include <main_decl.h>
#include <program_loading.h>
#include <soc/intel/common/util.h>
#include <fsp/util.h>
/*
* Systems without a native coreboot cache-as-ram teardown may implement
* this to use an alternate method.
*/
__attribute__((weak)) void late_car_teardown(void) { /* do nothing */ }
void main(void)
{
/* Call TempRamExit FSP API if enabled. */
if (IS_ENABLED(CONFIG_FSP_CAR))
fsp_temp_ram_exit();
late_car_teardown();
console_init();

View File

@ -47,3 +47,8 @@ void fsp_temp_ram_exit(void)
die("TempRamExit returned an error!\n");
}
}
void late_car_teardown(void)
{
fsp_temp_ram_exit();
}