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src/mainboard: Remove unused include 'sandybridge.h' 

Change-Id: I9356a56c34d1c6746cf8acfe931386ffed58ba74
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42353
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Elyes HAOUAS 2020-06-14 10:47:11 +02:00 committed by Patrick Georgi
parent 96a7a835bf
commit a138366f3a
24 changed files with 0 additions and 24 deletions
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1
src/mainboard/apple/macbookair4_2/early_init.c
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@ -1,7 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
#include <string.h> #include <string.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit_native.h> #include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/bd82x6x/pch.h>
#include <cbfs.h> #include <cbfs.h>

1
src/mainboard/asus/h61m-cs/early_init.c
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@ -1,7 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
#include <bootblock_common.h> #include <bootblock_common.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <device/pnp_ops.h> #include <device/pnp_ops.h>
#include <northbridge/intel/sandybridge/raminit_native.h> #include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/bd82x6x/pch.h>

1
src/mainboard/asus/maximus_iv_gene-z/early_init.c
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@ -4,7 +4,6 @@
#include <device/pnp_ops.h> #include <device/pnp_ops.h>
#include <device/dram/ddr3.h> #include <device/dram/ddr3.h>
#include <northbridge/intel/sandybridge/raminit_native.h> #include <northbridge/intel/sandybridge/raminit_native.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/bd82x6x/pch.h>
#include <superio/nuvoton/common/nuvoton.h> #include <superio/nuvoton/common/nuvoton.h>
#include <superio/nuvoton/nct6776/nct6776.h> #include <superio/nuvoton/nct6776/nct6776.h>

1
src/mainboard/asus/p8h61-m_lx/early_init.c
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@ -3,7 +3,6 @@
#include <bootblock_common.h> #include <bootblock_common.h>
#include <device/dram/ddr3.h> #include <device/dram/ddr3.h>
#include <northbridge/intel/sandybridge/raminit_native.h> #include <northbridge/intel/sandybridge/raminit_native.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/bd82x6x/pch.h>
#include <superio/nuvoton/common/nuvoton.h> #include <superio/nuvoton/common/nuvoton.h>
#include <superio/nuvoton/nct6776/nct6776.h> #include <superio/nuvoton/nct6776/nct6776.h>

1
src/mainboard/asus/p8h61-m_lx3_r2_0/early_init.c
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@ -3,7 +3,6 @@
#include <bootblock_common.h> #include <bootblock_common.h>
#include <device/pnp_ops.h> #include <device/pnp_ops.h>
#include <northbridge/intel/sandybridge/raminit_native.h> #include <northbridge/intel/sandybridge/raminit_native.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/bd82x6x/pch.h>
#include <superio/nuvoton/common/nuvoton.h> #include <superio/nuvoton/common/nuvoton.h>
#include <superio/nuvoton/nct6779d/nct6779d.h> #include <superio/nuvoton/nct6779d/nct6779d.h>

1
src/mainboard/asus/p8h61-m_pro/early_init.c
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@ -3,7 +3,6 @@
#include <bootblock_common.h> #include <bootblock_common.h>
#include <device/pnp_ops.h> #include <device/pnp_ops.h>
#include <northbridge/intel/sandybridge/raminit_native.h> #include <northbridge/intel/sandybridge/raminit_native.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/bd82x6x/pch.h>
#include <superio/nuvoton/common/nuvoton.h> #include <superio/nuvoton/common/nuvoton.h>
#include <superio/nuvoton/nct6776/nct6776.h> #include <superio/nuvoton/nct6776/nct6776.h>

1
src/mainboard/asus/p8z77-v_lx2/early_init.c
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@ -2,7 +2,6 @@
#include <bootblock_common.h> #include <bootblock_common.h>
#include <device/pnp_ops.h> #include <device/pnp_ops.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit_native.h> #include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/bd82x6x/pch.h>
#include <superio/nuvoton/common/nuvoton.h> #include <superio/nuvoton/common/nuvoton.h>

1
src/mainboard/gigabyte/ga-b75m-d3h/early_init.c
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@ -2,7 +2,6 @@
#include <bootblock_common.h> #include <bootblock_common.h>
#include <northbridge/intel/sandybridge/raminit_native.h> #include <northbridge/intel/sandybridge/raminit_native.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/bd82x6x/pch.h>
#include <superio/ite/common/ite.h> #include <superio/ite/common/ite.h>
#include <superio/ite/it8728f/it8728f.h> #include <superio/ite/it8728f/it8728f.h>

1
src/mainboard/gigabyte/ga-h61m-series/early_init.c
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@ -2,7 +2,6 @@
#include <bootblock_common.h> #include <bootblock_common.h>
#include <northbridge/intel/sandybridge/raminit_native.h> #include <northbridge/intel/sandybridge/raminit_native.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/bd82x6x/pch.h>
#include <superio/ite/common/ite.h> #include <superio/ite/common/ite.h>
#include <superio/ite/it8728f/it8728f.h> #include <superio/ite/it8728f/it8728f.h>

1
src/mainboard/hp/compaq_8200_elite_sff/early_init.c
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@ -3,7 +3,6 @@
#include <bootblock_common.h> #include <bootblock_common.h>
#include <superio/nuvoton/npcd378/npcd378.h> #include <superio/nuvoton/npcd378/npcd378.h>
#include <superio/nuvoton/common/nuvoton.h> #include <superio/nuvoton/common/nuvoton.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit_native.h> #include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/bd82x6x/pch.h>

1
src/mainboard/hp/snb_ivb_laptops/variants/2570p/early_init.c
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@ -1,7 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
#include <bootblock_common.h> #include <bootblock_common.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit_native.h> #include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/bd82x6x/pch.h>
#include <ec/hp/kbc1126/ec.h> #include <ec/hp/kbc1126/ec.h>

1
src/mainboard/hp/snb_ivb_laptops/variants/2760p/early_init.c
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@ -1,7 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
#include <bootblock_common.h> #include <bootblock_common.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit_native.h> #include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/bd82x6x/pch.h>
#include <ec/hp/kbc1126/ec.h> #include <ec/hp/kbc1126/ec.h>

1
src/mainboard/hp/snb_ivb_laptops/variants/8460p/early_init.c
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@ -1,7 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
#include <bootblock_common.h> #include <bootblock_common.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit_native.h> #include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/bd82x6x/pch.h>
#include <superio/smsc/lpc47n217/lpc47n217.h> #include <superio/smsc/lpc47n217/lpc47n217.h>

1
src/mainboard/hp/snb_ivb_laptops/variants/8470p/early_init.c
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@ -1,7 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
#include <bootblock_common.h> #include <bootblock_common.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit_native.h> #include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/bd82x6x/pch.h>
#include <superio/smsc/lpc47n217/lpc47n217.h> #include <superio/smsc/lpc47n217/lpc47n217.h>

1
src/mainboard/hp/snb_ivb_laptops/variants/8770w/early_init.c
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@ -1,7 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
#include <bootblock_common.h> #include <bootblock_common.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit_native.h> #include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/bd82x6x/pch.h>
#include <superio/smsc/lpc47n217/lpc47n217.h> #include <superio/smsc/lpc47n217/lpc47n217.h>

1
src/mainboard/hp/snb_ivb_laptops/variants/folio_9470m/early_init.c
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@ -1,7 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
#include <bootblock_common.h> #include <bootblock_common.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit_native.h> #include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/bd82x6x/pch.h>
#include <ec/hp/kbc1126/ec.h> #include <ec/hp/kbc1126/ec.h>

1
src/mainboard/hp/snb_ivb_laptops/variants/revolve_810_g1/early_init.c
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@ -4,7 +4,6 @@
#include <string.h> #include <string.h>
#include <cbfs.h> #include <cbfs.h>
#include <console/console.h> #include <console/console.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit_native.h> #include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/bd82x6x/pch.h>
#include <ec/hp/kbc1126/ec.h> #include <ec/hp/kbc1126/ec.h>

1
src/mainboard/hp/z220_sff_workstation/early_init.c
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@ -3,7 +3,6 @@
#include <bootblock_common.h> #include <bootblock_common.h>
#include <superio/nuvoton/npcd378/npcd378.h> #include <superio/nuvoton/npcd378/npcd378.h>
#include <superio/nuvoton/common/nuvoton.h> #include <superio/nuvoton/common/nuvoton.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit_native.h> #include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/bd82x6x/pch.h>

1
src/mainboard/lenovo/l520/early_init.c
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@ -1,6 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit_native.h> #include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/bd82x6x/pch.h>
#include <southbridge/intel/common/gpio.h> #include <southbridge/intel/common/gpio.h>

1
src/mainboard/lenovo/s230u/early_init.c
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@ -5,7 +5,6 @@
#include <cbfs.h> #include <cbfs.h>
#include <device/pci_ops.h> #include <device/pci_ops.h>
#include <console/console.h> #include <console/console.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit_native.h> #include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/bd82x6x/pch.h>
#include <southbridge/intel/common/gpio.h> #include <southbridge/intel/common/gpio.h>

1
src/mainboard/lenovo/x1_carbon_gen1/early_init.c
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@ -3,7 +3,6 @@
#include <stdint.h> #include <stdint.h>
#include <string.h> #include <string.h>
#include <console/console.h> #include <console/console.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit_native.h> #include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/bd82x6x/pch.h>
#include <southbridge/intel/common/gpio.h> #include <southbridge/intel/common/gpio.h>

1
src/mainboard/lenovo/x230/variants/x230/early_init.c
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@ -1,6 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit_native.h> #include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/bd82x6x/pch.h>
#include <southbridge/intel/common/gpio.h> #include <southbridge/intel/common/gpio.h>

1
src/mainboard/sapphire/pureplatinumh61/early_init.c
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@ -2,7 +2,6 @@
#include <device/pci_ops.h> #include <device/pci_ops.h>
#include <device/pci_def.h> #include <device/pci_def.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit_native.h> #include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/bd82x6x/pch.h>

1
util/autoport/bd82x6x.go
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@ -297,7 +297,6 @@ func (b bd82x6x) Scan(ctx Context, addr PCIDevData) {
sb.WriteString(` sb.WriteString(`
#include <bootblock_common.h> #include <bootblock_common.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit_native.h> #include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/bd82x6x/pch.h>