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device: Use pcidev_path_behind() 

Change-Id: Iac16f9412d0e6aac908d873c61a4de3935e5318a
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/26518
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Kyösti Mälkki 2018-05-23 20:00:16 +03:00 committed by Felix Held
parent e7377556cc
commit a144e4d6fa
7 changed files with 14 additions and 14 deletions
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3
src/mainboard/roda/rk9/ti_pci7xx1.c
View File

@ -24,7 +24,6 @@ static void pci7xx1_enable(struct device *const dev)
{
printk(BIOS_DEBUG, "%s: TI PCI7xx1 media controller\n", __func__);
if (PCI_FUNC(dev->path.pci.devfn) == 0) {
const uint16_t secondary = dev->bus->secondary;
const unsigned slot = PCI_SLOT(dev->path.pci.devfn);
int fn;
@ -33,7 +32,7 @@ static void pci7xx1_enable(struct device *const dev)
u16 gcr = pci_read_config16(dev, 0x86);
for (fn = 5; fn > 0; --fn) {
const struct device *const d =
dev_find_slot(secondary, PCI_DEVFN(slot, fn));
pcidev_path_behind(dev->bus, PCI_DEVFN(slot, fn));
if (!d || d->enabled) continue;
printk(BIOS_DEBUG,
"%s: Hiding function #%d.\n", __func__, fn);

4
src/southbridge/amd/amd8111/amd8111.c
View File

@ -30,7 +30,7 @@ void amd8111_enable(struct device *dev)
{
unsigned devfn;
devfn = bus_dev->path.pci.devfn + (1 << 3);
lpc_dev = dev_find_slot(bus_dev->bus->secondary, devfn);
lpc_dev = pcidev_path_behind(bus_dev->bus, devfn);
index = ((dev->path.pci.devfn & ~7) >> 3) + 8;
if (dev->path.pci.devfn == 2) { /* EHCI */
index = 16;
@ -38,7 +38,7 @@ void amd8111_enable(struct device *dev)
} else {
unsigned devfn;
devfn = (dev->path.pci.devfn) & ~7;
lpc_dev = dev_find_slot(dev->bus->secondary, devfn);
lpc_dev = pcidev_path_behind(dev->bus, devfn);
index = dev->path.pci.devfn & 7;
}
if ((!lpc_dev) || (index >= 17)) {

2
src/southbridge/amd/sb700/sb700.c
View File

@ -27,7 +27,7 @@ static struct device *find_sm_dev(struct device *dev, u32 devfn)
{
struct device *sm_dev;
sm_dev = dev_find_slot(dev->bus->secondary, devfn);
sm_dev = pcidev_path_behind(dev->bus, devfn);
if (!sm_dev)
return sm_dev;

2
src/southbridge/amd/sb800/sb800.c
View File

@ -28,7 +28,7 @@ static struct device *find_sm_dev(struct device *dev, u32 devfn)
{
struct device *sm_dev;
sm_dev = dev_find_slot(dev->bus->secondary, devfn);
sm_dev = pcidev_path_behind(dev->bus, devfn);
if (!sm_dev)
return sm_dev;

7
src/southbridge/broadcom/bcm5785/bcm5785.c
View File

@ -32,14 +32,15 @@ void bcm5785_enable(struct device *dev)
{
unsigned devfn;
devfn = bus_dev->path.pci.devfn + (1 << 3);
sb_pci_main_dev = dev_find_slot(bus_dev->bus->secondary, devfn);
sb_pci_main_dev = pcidev_path_behind(bus_dev->bus, devfn);
// index = ((dev->path.pci.devfn & ~7) >> 3) + 8;
} else if ((bus_dev->vendor == PCI_VENDOR_ID_SERVERWORKS) &&
(bus_dev->device == 0x0104)) // device under PCI Bridge (under PCI-X)
{
unsigned devfn;
devfn = bus_dev->bus->dev->path.pci.devfn + (1 << 3);
sb_pci_main_dev = dev_find_slot(bus_dev->bus->dev->bus->secondary, devfn);
sb_pci_main_dev = pcidev_path_behind(bus_dev->bus->dev->bus,
devfn);
// index = ((dev->path.pci.devfn & ~7) >> 3) + 8;
}
else { // same bus
@ -51,7 +52,7 @@ void bcm5785_enable(struct device *dev)
else if (dev->device == 0x0223) // USB
{ devfn -= (1<<3); }
}
sb_pci_main_dev = dev_find_slot(dev->bus->secondary, devfn);
sb_pci_main_dev = pcidev_path_behind(dev->bus, devfn);
// index = dev->path.pci.devfn & 7;
}
if (!sb_pci_main_dev) {

2
src/southbridge/nvidia/ck804/ck804.c
View File

@ -27,7 +27,7 @@ static struct device *find_lpc_dev(struct device *dev, unsigned devfn)
{
struct device *lpc_dev;
lpc_dev = dev_find_slot(dev->bus->secondary, devfn);
lpc_dev = pcidev_path_behind(dev->bus, devfn);
if (!lpc_dev)
return lpc_dev;

8
src/southbridge/nvidia/mcp55/mcp55.c
View File

@ -30,7 +30,7 @@ static struct device *find_lpc_dev(struct device *dev, unsigned devfn)
{
struct device *lpc_dev;
lpc_dev = dev_find_slot(dev->bus->secondary, devfn);
lpc_dev = pcidev_path_behind(dev->bus, devfn);
if (!lpc_dev)
return lpc_dev;
@ -158,7 +158,7 @@ void mcp55_enable(struct device *dev)
return;
if (index2 != 0) {
sm_dev = dev_find_slot(dev->bus->secondary, devfn + 1);
sm_dev = pcidev_path_behind(dev->bus, devfn + 1);
if (!sm_dev)
return;
if (sm_dev) {
@ -187,7 +187,7 @@ void mcp55_enable(struct device *dev)
}
if (index == 16) {
sm_dev = dev_find_slot(dev->bus->secondary, devfn + 1);
sm_dev = pcidev_path_behind(dev->bus, devfn + 1);
if (!sm_dev)
return;
@ -211,7 +211,7 @@ void mcp55_enable(struct device *dev)
/* NIC1 is the final, we need update final reg to 0xe8. */
if (index == 9) {
sm_dev = dev_find_slot(dev->bus->secondary, devfn + 1);
sm_dev = pcidev_path_behind(dev->bus, devfn + 1);
if (!sm_dev)
return;
reg_old = pci_read_config32(sm_dev, 0xe8);