sb/intel/lynxpoint: Drop unneeded and rotten Kconfig option
Not selecting `ME_MBP_CLEAR_LATE` results in a build failure. Since both traditional and ULT platforms are known to be working, drop the option. Change-Id: I09ce27f812966800e36f6c0624c93759089faf45 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44547 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
parent
1452c80ee9
commit
a151c22b34
|
@ -51,15 +51,6 @@ config SERIRQ_CONTINUOUS_MODE
|
||||||
If you set this option to y, the serial IRQ machine will be
|
If you set this option to y, the serial IRQ machine will be
|
||||||
operated in continuous mode.
|
operated in continuous mode.
|
||||||
|
|
||||||
config ME_MBP_CLEAR_LATE
|
|
||||||
bool "Defer wait for ME MBP Cleared"
|
|
||||||
default y
|
|
||||||
help
|
|
||||||
If you set this option to y, the Management Engine driver
|
|
||||||
will defer waiting for the MBP Cleared indicator until the
|
|
||||||
finalize step. This can speed up boot time if the ME takes
|
|
||||||
a long time to indicate this status.
|
|
||||||
|
|
||||||
config FINALIZE_USB_ROUTE_XHCI
|
config FINALIZE_USB_ROUTE_XHCI
|
||||||
bool "Route all ports to XHCI controller in finalize step"
|
bool "Route all ports to XHCI controller in finalize step"
|
||||||
default y
|
default y
|
||||||
|
|
|
@ -548,10 +548,8 @@ void intel_me_finalize_smm(void)
|
||||||
if (!mei_base_address || mei_base_address == (u32 *)0xfffffff0)
|
if (!mei_base_address || mei_base_address == (u32 *)0xfffffff0)
|
||||||
return;
|
return;
|
||||||
|
|
||||||
#if CONFIG(ME_MBP_CLEAR_LATE)
|
|
||||||
/* Wait for ME MBP Cleared indicator */
|
/* Wait for ME MBP Cleared indicator */
|
||||||
intel_me_mbp_clear(PCH_ME_DEV);
|
intel_me_mbp_clear(PCH_ME_DEV);
|
||||||
#endif
|
|
||||||
|
|
||||||
/* Make sure ME is in a mode that expects EOP */
|
/* Make sure ME is in a mode that expects EOP */
|
||||||
reg32 = pci_read_config32(PCH_ME_DEV, PCI_ME_HFS);
|
reg32 = pci_read_config32(PCH_ME_DEV, PCI_ME_HFS);
|
||||||
|
@ -927,11 +925,6 @@ static int __unused intel_me_read_mbp(me_bios_payload *mbp_data, struct device *
|
||||||
host.interrupt_generate = 1;
|
host.interrupt_generate = 1;
|
||||||
write_host_csr(&host);
|
write_host_csr(&host);
|
||||||
|
|
||||||
#if !CONFIG(ME_MBP_CLEAR_LATE)
|
|
||||||
/* Wait for the mbp_cleared indicator. */
|
|
||||||
intel_me_mbp_clear(dev);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* Dump out the MBP contents. */
|
/* Dump out the MBP contents. */
|
||||||
if (CONFIG_DEFAULT_CONSOLE_LOGLEVEL >= BIOS_DEBUG) {
|
if (CONFIG_DEFAULT_CONSOLE_LOGLEVEL >= BIOS_DEBUG) {
|
||||||
printk(BIOS_INFO, "ME MBP: Header: items: %d, size dw: %d\n",
|
printk(BIOS_INFO, "ME MBP: Header: items: %d, size dw: %d\n",
|
||||||
|
|
Loading…
Reference in New Issue