Depends on the "Introduce get_vt8237_lpc() function" and
"Use get_vt8237_lpc() in vt8237_sb_enable_fid_vid()" patches. This adds VT8237A specific VLINK/LPC init in vt8237r_early_smbus.c I ran some tests and apparently both the | /* So the chip knows we are on AMD. */ | pci_write_config8(devctl, 0x7c, 0x7f); and | /* | * Allow SLP# signal to assert LDTSTOP_L. | * Will work for C3 and for FID/VID change. | */ | outb(0x1, VT8237R_ACPI_IO_BASE + 0x11); in vt8237r_early_smbus.c are needed on VT8237A, otherwise I get a (non-fatal) fid/vid change error on boot. While vt8237a_vlink_init() in vt8237_ctrl.c is a modified vt8237r_vlink_init(), vt8237a_init() in vt8237r_lpc.c is a modified vt8237s_init(). Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de> Acked-by: Rudolf Marek <r.marek@assembler.cz> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6043 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
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@ -257,19 +257,30 @@ void vt8237_sb_enable_fid_vid(void)
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return;
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devid = pci_read_config16(dev, PCI_DEVICE_ID);
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if (devid == PCI_DEVICE_ID_VIA_VT8237S_LPC) {
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/* generic setup */
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/* Set ACPI base address to I/O VT8237R_ACPI_IO_BASE. */
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pci_write_config16(dev, 0x88, VT8237R_ACPI_IO_BASE | 0x1);
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/* Enable ACPI accessm RTC signal gated with PSON. */
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pci_write_config8(dev, 0x81, 0x84);
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/* chipset-specific parts */
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/* VLINK: FIXME: can we drop the devid check and just look for the VLINK device? */
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if (devid == PCI_DEVICE_ID_VIA_VT8237S_LPC ||
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devid == PCI_DEVICE_ID_VIA_VT8237A_LPC) {
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devctl = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA,
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PCI_DEVICE_ID_VIA_VT8237_VLINK), 0);
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if (devctl == PCI_DEV_INVALID)
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return;
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/* Set ACPI base address to I/O VT8237R_ACPI_IO_BASE. */
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pci_write_config16(dev, 0x88, VT8237R_ACPI_IO_BASE | 0x1);
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/* Enable ACPI accessm RTC signal gated with PSON. */
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pci_write_config8(dev, 0x81, 0x84);
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if (devctl != PCI_DEV_INVALID) {
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/* So the chip knows we are on AMD. */
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pci_write_config8(devctl, 0x7c, 0x7f);
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}
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}
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if (devid == PCI_DEVICE_ID_VIA_VT8237S_LPC) {
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/*
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* Allow SLP# signal to assert LDTSTOP_L.
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* Will work for C3 and for FID/VID change.
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@ -280,17 +291,10 @@ void vt8237_sb_enable_fid_vid(void)
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/* Reduce further the STPCLK/LDTSTP signal to 5us. */
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pci_write_config8(dev, 0xec, 0x4);
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/* So the chip knows we are on AMD. */
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pci_write_config8(devctl, 0x7c, 0x7f);
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return;
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}
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/* Set ACPI base address to I/O VT8237R_ACPI_IO_BASE. */
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pci_write_config16(dev, 0x88, VT8237R_ACPI_IO_BASE | 0x1);
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/* Enable ACPI accessm RTC signal gated with PSON. */
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pci_write_config8(dev, 0x81, 0x84);
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/* VT8237R and VT8237A */
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/*
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* Allow SLP# signal to assert LDTSTOP_L.
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