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Depends on the "Introduce get_vt8237_lpc() function" and 

"Use get_vt8237_lpc() in vt8237_sb_enable_fid_vid()" patches.

This adds VT8237A specific VLINK/LPC init in vt8237r_early_smbus.c
I ran some tests and apparently both the

|			/* So the chip knows we are on AMD. */
|			pci_write_config8(devctl, 0x7c, 0x7f);

and

|	/*
|	 * Allow SLP# signal to assert LDTSTOP_L.
|	 * Will work for C3 and for FID/VID change.
|	 */
|	outb(0x1, VT8237R_ACPI_IO_BASE + 0x11);

in vt8237r_early_smbus.c are needed on VT8237A, otherwise I get a (non-fatal)
fid/vid change error on boot.

While vt8237a_vlink_init() in vt8237_ctrl.c is a modified vt8237r_vlink_init(),
vt8237a_init() in vt8237r_lpc.c is a modified vt8237s_init().

Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Acked-by: Rudolf Marek <r.marek@assembler.cz>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6043 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Tobias Diedrich 2010-11-07 19:17:18 +00:00 committed by Rudolf Marek
parent 7714cd0515
commit a151f27cb0
1 changed files with 21 additions and 17 deletions
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30
src/southbridge/via/vt8237r/vt8237r_early_smbus.c
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@ -257,12 +257,8 @@ void vt8237_sb_enable_fid_vid(void)
return; return;
devid = pci_read_config16(dev, PCI_DEVICE_ID); devid = pci_read_config16(dev, PCI_DEVICE_ID);
if (devid == PCI_DEVICE_ID_VIA_VT8237S_LPC) {
devctl = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA,
PCI_DEVICE_ID_VIA_VT8237_VLINK), 0);
if (devctl == PCI_DEV_INVALID) /* generic setup */
return;
/* Set ACPI base address to I/O VT8237R_ACPI_IO_BASE. */ /* Set ACPI base address to I/O VT8237R_ACPI_IO_BASE. */
pci_write_config16(dev, 0x88, VT8237R_ACPI_IO_BASE | 0x1); pci_write_config16(dev, 0x88, VT8237R_ACPI_IO_BASE | 0x1);
@ -270,6 +266,21 @@ void vt8237_sb_enable_fid_vid(void)
/* Enable ACPI accessm RTC signal gated with PSON. */ /* Enable ACPI accessm RTC signal gated with PSON. */
pci_write_config8(dev, 0x81, 0x84); pci_write_config8(dev, 0x81, 0x84);
/* chipset-specific parts */
/* VLINK: FIXME: can we drop the devid check and just look for the VLINK device? */
if (devid == PCI_DEVICE_ID_VIA_VT8237S_LPC ||
devid == PCI_DEVICE_ID_VIA_VT8237A_LPC) {
devctl = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA,
PCI_DEVICE_ID_VIA_VT8237_VLINK), 0);
if (devctl != PCI_DEV_INVALID) {
/* So the chip knows we are on AMD. */
pci_write_config8(devctl, 0x7c, 0x7f);
}
}
if (devid == PCI_DEVICE_ID_VIA_VT8237S_LPC) {
/* /*
* Allow SLP# signal to assert LDTSTOP_L. * Allow SLP# signal to assert LDTSTOP_L.
* Will work for C3 and for FID/VID change. * Will work for C3 and for FID/VID change.
@ -280,17 +291,10 @@ void vt8237_sb_enable_fid_vid(void)
/* Reduce further the STPCLK/LDTSTP signal to 5us. */ /* Reduce further the STPCLK/LDTSTP signal to 5us. */
pci_write_config8(dev, 0xec, 0x4); pci_write_config8(dev, 0xec, 0x4);
/* So the chip knows we are on AMD. */
pci_write_config8(devctl, 0x7c, 0x7f);
return; return;
} }
/* Set ACPI base address to I/O VT8237R_ACPI_IO_BASE. */ /* VT8237R and VT8237A */
pci_write_config16(dev, 0x88, VT8237R_ACPI_IO_BASE | 0x1);
/* Enable ACPI accessm RTC signal gated with PSON. */
pci_write_config8(dev, 0x81, 0x84);
/* /*
* Allow SLP# signal to assert LDTSTOP_L. * Allow SLP# signal to assert LDTSTOP_L.