diff --git a/Makefile.inc b/Makefile.inc index da350d196a..69ad3a1e9f 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -212,7 +212,8 @@ CFLAGS += -Werror endif CFLAGS += -fno-common -ffreestanding -fno-builtin -fomit-frame-pointer -additional-dirs := $(objutil)/cbfstool $(objutil)/romcc $(objutil)/ifdtool $(objutil)/options +additional-dirs := $(objutil)/cbfstool $(objutil)/romcc $(objutil)/ifdtool \ + $(objutil)/ifdfake $(objutil)/options ####################################################################### # generate build support files @@ -275,6 +276,11 @@ $(IFDTOOL): $(top)/util/ifdtool/ifdtool.c @printf " HOSTCC $(subst $(obj)/,,$(@))\n" $(HOSTCC) $(HOSTCFLAGS) -o $@ $< +IFDFAKE:=$(objutil)/ifdfake/ifdfake +$(IFDFAKE): $(top)/util/ifdfake/ifdfake.c + @printf " HOSTCC $(subst $(obj)/,,$(@))\n" + $(HOSTCC) $(HOSTCFLAGS) -o $@ $< + ####################################################################### # needed objects that every mainboard uses # Creation of these is architecture and mainboard independent diff --git a/src/southbridge/intel/bd82x6x/Kconfig b/src/southbridge/intel/bd82x6x/Kconfig index 08a60f91f2..61ef7eb76f 100644 --- a/src/southbridge/intel/bd82x6x/Kconfig +++ b/src/southbridge/intel/bd82x6x/Kconfig @@ -59,6 +59,52 @@ config HPET_MIN_TICKS hex default 0x80 +config HAVE_IFD_BIN + bool + default y + +config BUILD_WITH_FAKE_IFD + bool "Build with a fake IFD" + default y if !HAVE_IFD_BIN + help + If you don't have an Intel Firmware Descriptor (ifd.bin) for your + board, you can select this option and coreboot will build without it. + Though, the resulting coreboot.rom will not contain all parts required + to get coreboot running on your board. You can however write only the + BIOS section to your board's flash ROM and keep the other sections + untouched. Unfortunately the current version of flashrom doesn't + support this yet. But there is a patch pending [1]. + + WARNING: Never write a complete coreboot.rom to your flash ROM if it + was built with a fake IFD. It just won't work. + + [1] http://www.flashrom.org/pipermail/flashrom/2013-June/011083.html + +config IFD_BIOS_SECTION + depends on BUILD_WITH_FAKE_IFD + string + default "" + +config IFD_ME_SECTION + depends on BUILD_WITH_FAKE_IFD + string + default "" + +config IFD_GBE_SECTION + depends on BUILD_WITH_FAKE_IFD + string + default "" + +config IFD_PLATFORM_SECTION + depends on BUILD_WITH_FAKE_IFD + string + default "" + +config IFD_BIN_PATH + string "Path to intel firmware descriptor" + depends on !BUILD_WITH_FAKE_IFD + default "3rdparty/mainboard/$(MAINBOARDDIR)/descriptor.bin" + config HAVE_GBE_BIN bool "Add gigabit ethernet firmware" default n @@ -76,12 +122,9 @@ config ME_BIN_PATH string "Path to management engine firmware" default "3rdparty/mainboard/$(MAINBOARDDIR)/me.bin" -config IFD_BIN_PATH - string "Path to intel firmware descriptor" - default "3rdparty/mainboard/$(MAINBOARDDIR)/descriptor.bin" - config LOCK_MANAGEMENT_ENGINE bool "Lock Management Engine section" + depends on !BUILD_WITH_FAKE_IFD default n help The Intel Management Engine supports preventing write accesses diff --git a/src/southbridge/intel/bd82x6x/Makefile.inc b/src/southbridge/intel/bd82x6x/Makefile.inc index e277450a45..257bff5394 100644 --- a/src/southbridge/intel/bd82x6x/Makefile.inc +++ b/src/southbridge/intel/bd82x6x/Makefile.inc @@ -52,9 +52,27 @@ smm-$(CONFIG_USBDEBUG) += usb_debug.c romstage-y += reset.c romstage-y += early_spi.c -bd82x6x_add_me: $(obj)/coreboot.pre $(IFDTOOL) +ifeq ($(CONFIG_BUILD_WITH_FAKE_IFD),y) +IFD_BIN_PATH := $(objgenerated)/ifdfake.bin +IFD_SECTIONS := $(addprefix -b ,$(CONFIG_IFD_BIOS_SECTION:"%"=%)) \ + $(addprefix -m ,$(CONFIG_IFD_ME_SECTION:"%"=%)) \ + $(addprefix -g ,$(CONFIG_IFD_GBE_SECTION:"%"=%)) \ + $(addprefix -p ,$(CONFIG_IFD_PLATFORM_SECTION:"%"=%)) +else +IFD_BIN_PATH := $(CONFIG_IFD_BIN_PATH) +endif + +bd82x6x_add_me: $(obj)/coreboot.pre $(IFDTOOL) $(IFDFAKE) +ifeq ($(CONFIG_BUILD_WITH_FAKE_IFD),y) + printf "\n** WARNING **\n" + printf "Coreboot will be built with a fake Intel Firmware Descriptor (IFD).\n" + printf "Never write a complete coreboot.rom with a fake IFD to your board's\n" + printf "flash ROM! Make sure that you only write valid flash regions.\n\n" + printf " IFDFAKE Building a fake Intel Firmware Descriptor\n" + $(IFDFAKE) $(IFD_SECTIONS) $(IFD_BIN_PATH) +endif printf " DD Adding Intel Firmware Descriptor\n" - dd if=$(CONFIG_IFD_BIN_PATH) \ + dd if=$(IFD_BIN_PATH) \ of=$(obj)/coreboot.pre conv=notrunc >/dev/null 2>&1 printf " IFDTOOL me.bin -> coreboot.pre\n" $(objutil)/ifdtool/ifdtool \ @@ -72,7 +90,7 @@ ifeq ($(CONFIG_LOCK_MANAGEMENT_ENGINE),y) printf " IFDTOOL Locking Management Engine\n" $(objutil)/ifdtool/ifdtool -l $(obj)/coreboot.pre mv $(obj)/coreboot.pre.new $(obj)/coreboot.pre -else +else ifneq ($(CONFIG_BUILD_WITH_FAKE_IFD),y) printf " IFDTOOL Unlocking Management Engine\n" $(objutil)/ifdtool/ifdtool -u $(obj)/coreboot.pre mv $(obj)/coreboot.pre.new $(obj)/coreboot.pre