mb/lippert/frontrunner-af: Switch away from ROMCC_BOOTBLOCK
Warning: Not tested on hardware. Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Signed-off-by: Mike Banon <mikebdp2@gmail.com> Change-Id: I63dd15ade28acb06da8d320edc8ae1fd433aa0e0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/38872 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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@ -13,14 +13,10 @@
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# GNU General Public License for more details.
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# GNU General Public License for more details.
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#
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#
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config BOARD_LIPPERT_FRONTRUNNER_AF
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def_bool n
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if BOARD_LIPPERT_FRONTRUNNER_AF
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if BOARD_LIPPERT_FRONTRUNNER_AF
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config BOARD_SPECIFIC_OPTIONS
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config BOARD_SPECIFIC_OPTIONS
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def_bool y
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def_bool y
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#select ROMCC_BOOTBLOCK
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select CPU_AMD_AGESA_FAMILY14
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select CPU_AMD_AGESA_FAMILY14
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select NORTHBRIDGE_AMD_AGESA_FAMILY14
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select NORTHBRIDGE_AMD_AGESA_FAMILY14
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select SOUTHBRIDGE_AMD_CIMX_SB800
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select SOUTHBRIDGE_AMD_CIMX_SB800
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@ -1,2 +1,2 @@
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#config BOARD_LIPPERT_FRONTRUNNER_AF
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config BOARD_LIPPERT_FRONTRUNNER_AF
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# bool"FrontRunner-AF aka ADLINK CoreModule2-GF"
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bool "FrontRunner-AF aka ADLINK CoreModule2-GF"
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@ -20,6 +20,8 @@ pci$(stripped_ahcibios_id).rom-file := $(call strip_quotes,$(CONFIG_AHCI_BIOS_FI
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pci$(stripped_ahcibios_id).rom-type := optionrom
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pci$(stripped_ahcibios_id).rom-type := optionrom
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endif
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endif
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bootblock-y += bootblock.c
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romstage-y += buildOpts.c
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romstage-y += buildOpts.c
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romstage-y += BiosCallOuts.c
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romstage-y += BiosCallOuts.c
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romstage-y += OemCustomize.c
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romstage-y += OemCustomize.c
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@ -13,14 +13,13 @@
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* GNU General Public License for more details.
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* GNU General Public License for more details.
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*/
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*/
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#include <bootblock_common.h>
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#include <northbridge/amd/agesa/state_machine.h>
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#include <northbridge/amd/agesa/state_machine.h>
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#include <superio/smsc/smscsuperio/smscsuperio.h>
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#include <superio/smsc/smscsuperio/smscsuperio.h>
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#include <sb_cimx.h>
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#define SERIAL_DEV PNP_DEV(0x4e, SMSCSUPERIO_SP1)
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#define SERIAL_DEV PNP_DEV(0x4e, SMSCSUPERIO_SP1)
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void board_BeforeAgesa(struct sysinfo *cb)
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void bootblock_mainboard_early_init(void)
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{
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{
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sb_Poweron_Init();
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smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
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smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
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}
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}
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@ -1124,7 +1124,6 @@ DefinitionBlock (
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External (TOM2)
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External (TOM2)
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Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */
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Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */
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Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */
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Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */
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Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
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/* Operating System Capabilities Method */
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/* Operating System Capabilities Method */
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Method (_OSC, 4)
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Method (_OSC, 4)
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