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intel/fsp_broadwell_de: Move and rename smm_lock() 

There will be inlined smm_lock() that would conflict
with this special case.

Change-Id: I6752cbcf4775f9c013f0b16033b40beb2c503f81
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34874
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Kyösti Mälkki 2019-08-14 14:30:21 +03:00 committed by Martin Roth
parent 71f0ceb03a
commit a1af2757b5
2 changed files with 18 additions and 15 deletions
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19
src/soc/intel/fsp_broadwell_de/cpu.c
View File

@ -25,8 +25,12 @@
#include <cpu/x86/mp.h> #include <cpu/x86/mp.h>
#include <cpu/x86/msr.h> #include <cpu/x86/msr.h>
#include <cpu/x86/mtrr.h> #include <cpu/x86/mtrr.h>
#include <device/device.h>
#include <device/pci_ops.h>
#include <soc/lpc.h>
#include <soc/msr.h> #include <soc/msr.h>
#include <soc/pattrs.h> #include <soc/pattrs.h>
#include <soc/pci_devs.h>
#include <soc/ramstage.h> #include <soc/ramstage.h>
#include <soc/smm.h> #include <soc/smm.h>
@ -94,6 +98,19 @@ static void set_max_ratio(void)
wrmsr(IA32_PERF_CTL, perf_ctl); wrmsr(IA32_PERF_CTL, perf_ctl);
} }
static void alt_smm_lock(void)
{
struct device *dev = pcidev_on_root(LPC_DEV, LPC_FUNC);
uint16_t smi_lock;
/* There is no register to lock SMRAM region on Broadwell-DE.
Use this function to lock the SMI control bits. */
printk(BIOS_DEBUG, "Locking SMM.\n");
smi_lock = pci_read_config16(dev, GEN_PMCON_1);
smi_lock |= (SMI_LOCK | SMI_LOCK_GP6 | SMI_LOCK_GP22);
pci_write_config16(dev, GEN_PMCON_1, smi_lock);
}
static void post_mp_init(void) static void post_mp_init(void)
{ {
/* Set Max Ratio */ /* Set Max Ratio */
@ -103,7 +120,7 @@ static void post_mp_init(void)
smm_southbridge_enable_smi(); smm_southbridge_enable_smi();
/* Set SMI lock bits. */ /* Set SMI lock bits. */
smm_lock(); alt_smm_lock();
} }
static const struct mp_ops mp_ops = { static const struct mp_ops mp_ops = {

14
src/soc/intel/fsp_broadwell_de/smmrelocate.c
View File

@ -27,7 +27,6 @@
#include <cpu/intel/smm_reloc.h> #include <cpu/intel/smm_reloc.h>
#include <console/console.h> #include <console/console.h>
#include <device/pci_ops.h> #include <device/pci_ops.h>
#include <soc/lpc.h>
#include <soc/msr.h> #include <soc/msr.h>
#include <soc/pci_devs.h> #include <soc/pci_devs.h>
#include <soc/smm.h> #include <soc/smm.h>
@ -305,16 +304,3 @@ void smm_relocate(void)
else if (!boot_cpu()) else if (!boot_cpu())
smm_initiate_relocation(); smm_initiate_relocation();
} }
void smm_lock(void)
{
pci_devfn_t dev = PCI_DEV(BUS0, LPC_DEV, LPC_FUNC);
uint16_t smi_lock;
/* There is no register to lock SMRAM region on Broadwell-DE.
Use this function to lock the SMI control bits. */
printk(BIOS_DEBUG, "Locking SMM.\n");
smi_lock = pci_read_config16(dev, GEN_PMCON_1);
smi_lock |= (SMI_LOCK | SMI_LOCK_GP6 | SMI_LOCK_GP22);
pci_write_config16(dev, GEN_PMCON_1, smi_lock);
}