soc/amd/stoneyridge: Add GPIO functions to romstage

A mainboard may access GPIO in romstage.

Change-Id: Id380c6570943ce2a0bf6112d62cc91aeae283fcf
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/20310
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

src/soc/amd/stoneyridge/Makefile.inc

@@ -48,6 +48,7 @@ romstage-y += early_setup.c
 romstage-y += dimmSpd.c
 romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c
 romstage-y += fixme.c
+romstage-y += gpio.c
 romstage-$(CONFIG_STONEYRIDGE_IMC_FWM) += imc.c
 romstage-y += smbus.c
 romstage-y += smbus_spd.c

src/soc/amd/stoneyridge/include/soc/gpio.h

@@ -16,7 +16,7 @@
 #ifndef _STONEYRIDGE_GPIO_H_
 #define _STONEYRIDGE_GPIO_H_
 
-#include <amd_defs.h>
+#include <soc/amd/common/amd_defs.h>
 #include <types.h>
 
 #define CROS_GPIO_DEVICE_NAME	"AmdKern"