GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Revert "soc/intel/xeon_sp: Fix devices list in the DMAR DRHD structure" 

This reverts commit 8122b3f612.
This broke DMAR. DRHD defines the scope of the device entries below.

Change-Id: Iac4858f774fa3811da43f7697a9392daba4b4fba
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52898
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Arthur Heymans 2021-05-04 18:40:28 +02:00
parent 6f8e9443aa
commit a1c4ad38d5
1 changed files with 13 additions and 13 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

26
src/soc/intel/xeon_sp/nb_acpi.c
View File

@ -198,6 +198,19 @@ static unsigned long acpi_create_drhd(unsigned long current, int socket,
if (!reg_base) if (!reg_base)
return current; return current;
// Add DRHD Hardware Unit
if (socket == 0 && stack == CSTACK) {
printk(BIOS_DEBUG, "[Hardware Unit Definition] Flags: 0x%x, PCI Segment Number: 0x%x, "
"Register Base Address: 0x%x\n",
DRHD_INCLUDE_PCI_ALL, pcie_seg, reg_base);
current += acpi_create_dmar_drhd(current, DRHD_INCLUDE_PCI_ALL,
pcie_seg, reg_base);
} else {
printk(BIOS_DEBUG, "[Hardware Unit Definition] Flags: 0x%x, PCI Segment Number: 0x%x, "
"Register Base Address: 0x%x\n", 0, pcie_seg, reg_base);
current += acpi_create_dmar_drhd(current, 0, pcie_seg, reg_base);
}
// Add PCH IOAPIC // Add PCH IOAPIC
if (socket == 0 && stack == CSTACK) { if (socket == 0 && stack == CSTACK) {
union p2sb_bdf ioapic_bdf = p2sb_get_ioapic_bdf(); union p2sb_bdf ioapic_bdf = p2sb_get_ioapic_bdf();
@ -263,19 +276,6 @@ static unsigned long acpi_create_drhd(unsigned long current, int socket,
} }
} }
// Add DRHD Hardware Unit
if (socket == 0 && stack == CSTACK) {
printk(BIOS_DEBUG, "[Hardware Unit Definition] Flags: 0x%x, PCI Segment Number: 0x%x, "
"Register Base Address: 0x%x\n",
DRHD_INCLUDE_PCI_ALL, pcie_seg, reg_base);
current += acpi_create_dmar_drhd(current, DRHD_INCLUDE_PCI_ALL,
pcie_seg, reg_base);
} else {
printk(BIOS_DEBUG, "[Hardware Unit Definition] Flags: 0x%x, PCI Segment Number: 0x%x, "
"Register Base Address: 0x%x\n", 0, pcie_seg, reg_base);
current += acpi_create_dmar_drhd(current, 0, pcie_seg, reg_base);
}
acpi_dmar_drhd_fixup(tmp, current); acpi_dmar_drhd_fixup(tmp, current);
return current; return current;