From a204cdf75b65c86f95cc9083e8a003baa3209071 Mon Sep 17 00:00:00 2001
From: Ivy Jian <ivy_jian@compal.corp-partner.google.com>
Date: Fri, 7 May 2021 10:50:49 +0800
Subject: [PATCH] mb/google/mancomb: Fix TPM setting in devicetree

Fix I2C3 setting for TPM in devicetree.

BUG=b:187341277
TEST=Build and boot into OS

Signed-off-by: Ivy Jian <ivy_jian@compal.corp-partner.google.com>
Change-Id: I728da76cee0c92c29df4c6ee8bfb4cd07a6366c4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/53891
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
---
 .../mancomb/variants/baseboard/devicetree.cb    | 17 +++++++++--------
 1 file changed, 9 insertions(+), 8 deletions(-)

diff --git a/src/mainboard/google/mancomb/variants/baseboard/devicetree.cb b/src/mainboard/google/mancomb/variants/baseboard/devicetree.cb
index 7ed9c1b3dd..0ba1f6da63 100644
--- a/src/mainboard/google/mancomb/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/mancomb/variants/baseboard/devicetree.cb
@@ -121,16 +121,17 @@ chip soc/amd/cezanne
 				device pnp 0c09.0 on end
 			end
 		end
-		device ref i2c_3 on
-			chip drivers/i2c/tpm
-				register "hid" = ""GOOG0005""
-				register "desc" = ""Cr50 TPM""
-				register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_3)"
-				device i2c 50 on end
-			end
-		end
 	end # domain
 
+	device ref i2c_3 on
+		chip drivers/i2c/tpm
+			register "hid" = ""GOOG0005""
+			register "desc" = ""Cr50 TPM""
+			register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_3)"
+			device i2c 50 on end
+		end
+	end
+
 	device ref uart_0 on end # UART0
 
 end	# chip soc/amd/cezanne