autoport: Add Intel PCIe Root Port and Bridges

- 0x0151: Xeon E3-1200 PCIe Root Port
- 0x1e25: 7/C216 Series Chipset Family DMI to PCI Bridge
- 0x2448: 82801 Mobile PCI Bridge
- 0x244e: 82801 Desktop PCI Bridge

Change-Id: I4111b73adc0f08d643c940cd43ab7fd4c0af7668
Signed-off-by: Jean Lucas <jean@4ray.co>
Reviewed-on: https://review.coreboot.org/22794
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Jean Lucas 2017-12-09 04:34:57 -05:00 committed by Martin Roth
parent 780a1c44e1
commit a241d6c76b
1 changed files with 5 additions and 4 deletions

View File

@ -439,10 +439,11 @@ func init() {
/* PCIe bridge */
for _, id := range []uint16{
0x1c10, 0x1c12, 0x1c14, 0x1c16,
0x1c18, 0x1c1a, 0x1c1c, 0x1c1e,
0x1e10, 0x1e12, 0x1e14, 0x1e16,
0x1e18, 0x1e1a, 0x1e1c, 0x1e1e,
0x0151, 0x1c10, 0x1c12, 0x1c14,
0x1c16, 0x1c18, 0x1c1a, 0x1c1c,
0x1c1e, 0x1e10, 0x1e12, 0x1e14,
0x1e16, 0x1e18, 0x1e1a, 0x1e1c,
0x1e1e, 0x1e25, 0x244e, 0x2448,
} {
RegisterPCI(0x8086, id, GenericPCI{})
}