soc/amd/common: add acpi_fill_gnvs()
In order to reduce code duplication provide an acpi_fill_gnvs() helper function. Intent is to move stoneyridge and picasso over to using this common implementation instead of duplicating it. BUG=b:159947207 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Change-Id: I21c6e2c24eaf42f31ae57c05df7f633d7dc266d9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/44482 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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@ -113,6 +113,44 @@ void acpi_clear_pm_gpe_status(void)
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acpi_write32(MMIO_ACPI_GPE0_STS, acpi_read32(MMIO_ACPI_GPE0_STS));
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}
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static int get_index_bit(uint32_t value, uint16_t limit)
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{
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uint16_t i;
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uint32_t t;
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if (limit >= TOTAL_BITS(uint32_t))
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return -1;
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/* get a mask of valid bits. Ex limit = 3, set bits 0-2 */
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t = (1 << limit) - 1;
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if ((value & t) == 0)
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return -1;
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t = 1;
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for (i = 0; i < limit; i++) {
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if (value & t)
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break;
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t <<= 1;
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}
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return i;
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}
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void acpi_fill_gnvs(struct global_nvs *gnvs, const struct acpi_pm_gpe_state *state)
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{
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int index;
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index = get_index_bit(state->pm1_sts & state->pm1_en, PM1_LIMIT);
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if (index < 0)
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gnvs->pm1i = ~0ULL;
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else
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gnvs->pm1i = index;
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index = get_index_bit(state->gpe0_sts & state->gpe0_en, GPE0_LIMIT);
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if (index < 0)
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gnvs->gpei = ~0ULL;
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else
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gnvs->gpei = index;
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}
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static void save_sws(uint16_t pm1_status)
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{
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struct soc_power_reg *sws;
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@ -4,6 +4,7 @@
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#define __AMDBLOCKS_ACPI_H__
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#include <types.h>
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#include <soc/nvs.h>
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/* ACPI MMIO registers 0xfed80800 */
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#define MMIO_ACPI_PM1_STS 0x00
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@ -32,6 +33,8 @@ void acpi_fill_pm_gpe_state(struct acpi_pm_gpe_state *state);
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void acpi_pm_gpe_add_events_print_events(const struct acpi_pm_gpe_state *state);
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/* Clear PM and GPE status registers. */
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void acpi_clear_pm_gpe_status(void);
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/* Fill GNVS object from PM GPE object. */
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void acpi_fill_gnvs(struct global_nvs *gnvs, const struct acpi_pm_gpe_state *state);
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void acpi_clear_pm1_status(void);
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