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soc/intel/skylake: Use newly added pmc_read_pm1_control 

BUG=b:67874513

Change-Id: I298065f30647ae9bba8f6a8481bd34eec64f1d8e
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/22083
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Furquan Shaikh 2017-10-16 22:26:58 -07:00 committed by Furquan Shaikh
parent 43810d9332
commit a2480184e0
1 changed files with 2 additions and 3 deletions
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5
src/soc/intel/skylake/smihandler.c
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@ -140,7 +140,7 @@ static void southbridge_smi_sleep(void)
pmc_disable_smi(SLP_SMI_EN);
/* Figure out SLP_TYP */
reg32 = inl(ACPI_BASE_ADDRESS + PM1_CNT);
reg32 = pmc_read_pm1_control();
printk(BIOS_SPEW, "SMI#: SLP = 0x%08x\n", reg32);
slp_typ = acpi_sleep_from_pm1(reg32);
@ -213,8 +213,7 @@ static void southbridge_smi_sleep(void)
* the line above. However, if we entered sleep state S1 and wake
* up again, we will continue to execute code in this function.
*/
reg32 = inl(ACPI_BASE_ADDRESS + PM1_CNT);
if (reg32 & SCI_EN) {
if (pmc_read_pm1_control() & SCI_EN) {
/* The OS is not an ACPI OS, so we set the state to S0 */
pmc_disable_pm1_control(SLP_EN | SLP_TYP);
}