GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mb/google/rex/var/screebo: Change GPP_C06 to NC 

GPP_C06 is the report pin of the touchpanel and has no actual function.
Disable this pin to solve the leakage problem.

BUG=b:298529441
BRANCH=none
TEST=Test success by EE.

Change-Id: I13f25788c0258639da4e277e7a15454a08d1599b
Signed-off-by: Zhongtian Wu <wuzhongtian@huaqin.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77716
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Zhongtian Wu 2023-09-07 20:19:43 +08:00 committed by Felix Held
parent d6326978ca
commit a254cc6672
2 changed files with 2 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/mainboard/google/rex/variants/screebo/gpio.c
View File

@ -107,8 +107,8 @@ static const struct pad_config gpio_table[] = {
PAD_NC(GPP_C04, NONE), PAD_NC(GPP_C04, NONE),
/* GPP_C05 : [] ==> WWAN_PERST_L_STRAP */ /* GPP_C05 : [] ==> WWAN_PERST_L_STRAP */
PAD_NC(GPP_C05, NONE), PAD_NC(GPP_C05, NONE),
/* GPP_C06 : [] ==> SOC_TCHSCR_RPT_EN */ /* GPP_C06 : net NC. Test pad. */
PAD_CFG_GPO(GPP_C06, 0, DEEP), PAD_NC(GPP_C06, NONE),
/* GPP_C07 : [] ==> SOC_TCHSCR_INT */ /* GPP_C07 : [] ==> SOC_TCHSCR_INT */
PAD_CFG_GPI_APIC(GPP_C07, NONE, PLTRST, LEVEL, NONE), PAD_CFG_GPI_APIC(GPP_C07, NONE, PLTRST, LEVEL, NONE),
/* GPP_C08 : [] ==> SOCHOT_ODL */ /* GPP_C08 : [] ==> SOCHOT_ODL */

4
src/mainboard/google/rex/variants/screebo/overridetree.cb
View File

@ -427,8 +427,6 @@ chip soc/intel/meteorlake
register "generic.reset_delay_ms" = "200" register "generic.reset_delay_ms" = "200"
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B17)" register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B17)"
register "generic.enable_delay_ms" = "12" register "generic.enable_delay_ms" = "12"
register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C06)"
register "generic.stop_off_delay_ms" = "2"
register "generic.has_power_resource" = "1" register "generic.has_power_resource" = "1"
register "hid_desc_reg_offset" = "0x01" register "hid_desc_reg_offset" = "0x01"
device i2c 41 on device i2c 41 on
@ -445,8 +443,6 @@ chip soc/intel/meteorlake
register "generic.reset_off_delay_ms" = "2" register "generic.reset_off_delay_ms" = "2"
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B17)" register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B17)"
register "generic.enable_delay_ms" = "1" register "generic.enable_delay_ms" = "1"
register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C06)"
register "generic.stop_off_delay_ms" = "2"
register "generic.has_power_resource" = "1" register "generic.has_power_resource" = "1"
register "hid_desc_reg_offset" = "0x01" register "hid_desc_reg_offset" = "0x01"
device i2c 10 on device i2c 10 on