soc/amd/common/block/include: make include guards more uniform

TEST=Timeless build doesn't change for Mandolin and Gardenia. Change-Id: I5d3ae1459c333658f4c86388f1822d92ca13c658 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47514 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jeremy Soller <jeremy@system76.com> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2020-11-12 14:37:41 +01:00 · 2020-11-12 14:37:41 +01:00 · a262fc6b07
parent 33b92efa51
commit a262fc6b07
23 changed files with 69 additions and 69 deletions
--- a/src/soc/amd/common/block/include/amdblocks/BiosCallOuts.h
+++ b/src/soc/amd/common/block/include/amdblocks/BiosCallOuts.h
@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

-#ifndef __CALLOUTS_AMD_AGESA_H__
-#define __CALLOUTS_AMD_AGESA_H__
+#ifndef __AMD_BLOCK_CALLOUTS_AGESA_H__
+#define __AMD_BLOCK_CALLOUTS_AGESA_H__

 #include <amdblocks/agesawrapper.h>
 #include <stdint.h>
@ -69,4 +69,4 @@ typedef struct {
 extern const BIOS_CALLOUT_STRUCT BiosCallouts[];
 extern const int BiosCalloutsLen;

-#endif /* __CALLOUTS_AMD_AGESA_H__ */
+#endif /* __AMD_BLOCK_CALLOUTS_AGESA_H__ */
--- a/src/soc/amd/common/block/include/amdblocks/acpi.h
+++ b/src/soc/amd/common/block/include/amdblocks/acpi.h
@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

-#ifndef __AMDBLOCKS_ACPI_H__
-#define __AMDBLOCKS_ACPI_H__
+#ifndef __AMD_BLOCK_ACPI_H__
+#define __AMD_BLOCK_ACPI_H__

 #include <types.h>
 #include <soc/nvs.h>
@ -44,4 +44,4 @@ void set_pm1cnt_s5(void);
 void acpi_enable_sci(void);
 void acpi_disable_sci(void);

-#endif /* __AMDBLOCKS_ACPI_H__ */
+#endif /* __AMD_BLOCK_ACPI_H__ */
--- a/src/soc/amd/common/block/include/amdblocks/acpimmio.h
+++ b/src/soc/amd/common/block/include/amdblocks/acpimmio.h
@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */

-#ifndef __AMDBLOCKS_ACPIMMIO_H__
-#define __AMDBLOCKS_ACPIMMIO_H__
+#ifndef __AMD_BLOCK_ACPIMMIO_H__
+#define __AMD_BLOCK_ACPIMMIO_H__

 #include <device/mmio.h>
 #include <types.h>
@ -508,4 +508,4 @@ static inline void aoac_write8(uint8_t reg, uint8_t value)
 	write8(acpimmio_aoac + reg, value);
 }

-#endif /* __AMDBLOCKS_ACPIMMIO_H__ */
+#endif /* __AMD_BLOCK_ACPIMMIO_H__ */
--- a/src/soc/amd/common/block/include/amdblocks/acpimmio_map.h
+++ b/src/soc/amd/common/block/include/amdblocks/acpimmio_map.h
@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */

-#ifndef __AMDBLOCKS_ACPIMMIO_MAP_H__
-#define __AMDBLOCKS_ACPIMMIO_MAP_H__
+#ifndef __AMD_BLOCK_ACPIMMIO_MAP_H__
+#define __AMD_BLOCK_ACPIMMIO_MAP_H__

 /*
 * The following AcpiMmio register block mapping represents definitions
@ -132,4 +132,4 @@

 #endif

-#endif /* __AMDBLOCKS_ACPIMMIO_MAP_H__ */
+#endif /* __AMD_BLOCK_ACPIMMIO_MAP_H__ */
--- a/src/soc/amd/common/block/include/amdblocks/agesawrapper.h
+++ b/src/soc/amd/common/block/include/amdblocks/agesawrapper.h
@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

-#ifndef __AGESAWRAPPER_H__
-#define __AGESAWRAPPER_H__
+#ifndef __AMD_BLOCK_AGESAWRAPPER_H__
+#define __AMD_BLOCK_AGESAWRAPPER_H__

 #include <agesa_headers.h>

@ -39,4 +39,4 @@ void SetNbMidParams(GNB_MID_CONFIGURATION *params);
 void set_board_env_params(GNB_ENV_CONFIGURATION *params);
 void soc_customize_init_early(AMD_EARLY_PARAMS *InitEarly);

-#endif /* __AGESAWRAPPER_H__ */
+#endif /* __AMD_BLOCK_AGESAWRAPPER_H__ */
--- a/src/soc/amd/common/block/include/amdblocks/agesawrapper_call.h
+++ b/src/soc/amd/common/block/include/amdblocks/agesawrapper_call.h
@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

-#ifndef __AGESAWRAPPER_CALL_H__
-#define __AGESAWRAPPER_CALL_H__
+#ifndef __AMD_BLOCK_AGESAWRAPPER_CALL_H__
+#define __AMD_BLOCK_AGESAWRAPPER_CALL_H__

 #include <amdblocks/agesawrapper.h>
 #include <stdint.h>
@ -41,4 +41,4 @@ static inline u32 do_agesawrapper(AGESA_STRUCT_NAME func, const char *name)
 	return (u32)ret;
 }

-#endif /* __AGESAWRAPPER_CALL_H__ */
+#endif /* __AMD_BLOCK_AGESAWRAPPER_CALL_H__ */
--- a/src/soc/amd/common/block/include/amdblocks/alink.h
+++ b/src/soc/amd/common/block/include/amdblocks/alink.h
@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

-#ifndef __AMDBLOCKS_ALINK_H__
-#define __AMDBLOCKS_ALINK_H__
+#ifndef __AMD_BLOCK_ALINK_H__
+#define __AMD_BLOCK_ALINK_H__

 #include <stdint.h>

@ -32,4 +32,4 @@ void alink_rc_indx(u32 reg_space, u32 reg_addr, u32 port, u32 mask, u32 val);
 void alink_ab_indx(u32 reg_space, u32 reg_addr, u32 mask, u32 val);
 void alink_ax_indx(u32 space /* c or p? */, u32 axindc, u32 mask, u32 val);

-#endif /* __AMDBLOCKS_ALINK_H__ */
+#endif /* __AMD_BLOCK_ALINK_H__ */
--- a/src/soc/amd/common/block/include/amdblocks/amd_pci_mmconf.h
+++ b/src/soc/amd/common/block/include/amdblocks/amd_pci_mmconf.h
@ -1,8 +1,8 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

-#ifndef __AMDBLOCKS_PCI_MMCONF_H__
-#define __AMDBLOCKS_PCI_MMCONF_H__
+#ifndef __AMD_BLOCK_PCI_MMCONF_H__
+#define __AMD_BLOCK_PCI_MMCONF_H__

 void enable_pci_mmconf(void);

-#endif
+#endif /* __AMD_BLOCK_PCI_MMCONF_H__ */
--- a/src/soc/amd/common/block/include/amdblocks/amd_pci_util.h
+++ b/src/soc/amd/common/block/include/amdblocks/amd_pci_util.h
@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

-#ifndef __AMD_PCI_UTIL_H__
-#define __AMD_PCI_UTIL_H__
+#ifndef __AMD_BLOCK_PCI_UTIL_H__
+#define __AMD_BLOCK_PCI_UTIL_H__

 #include <stdint.h>
 #include <soc/amd_pci_int_defs.h>
@ -31,4 +31,4 @@ void write_pci_cfg_irqs(void);
 void write_pci_int_table(void);
 const struct irq_idx_name *sb_get_apic_reg_association(size_t *size);

-#endif /* __AMD_PCI_UTIL_H__ */
+#endif /* __AMD_BLOCK_PCI_UTIL_H__ */
--- a/src/soc/amd/common/block/include/amdblocks/biosram.h
+++ b/src/soc/amd/common/block/include/amdblocks/biosram.h
@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

-#ifndef __AMDBLOCKS_BIOSRAM_H__
-#define __AMDBLOCKS_BIOSRAM_H__
+#ifndef __AMD_BLOCK_BIOSRAM_H__
+#define __AMD_BLOCK_BIOSRAM_H__

 #include <stdint.h>

@ -26,4 +26,4 @@ uint32_t get_uma_size(void);
 /* Returns the saved UMA base */
 uint64_t get_uma_base(void);

-#endif
+#endif /* __AMD_BLOCK_BIOSRAM_H__ */
--- a/src/soc/amd/common/block/include/amdblocks/car.h
+++ b/src/soc/amd/common/block/include/amdblocks/car.h
@ -1,10 +1,10 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

-#ifndef __AMD_CAR_H__
-#define __AMD_CAR_H__
+#ifndef __AMD_BLOCK_CAR_H__
+#define __AMD_BLOCK_CAR_H__

 #include <stdint.h>

 void ap_teardown_car(uint32_t flags);

-#endif /* __AMD_CAR_H__ */
+#endif /* __AMD_BLOCK_CAR_H__ */
--- a/src/soc/amd/common/block/include/amdblocks/chip.h
+++ b/src/soc/amd/common/block/include/amdblocks/chip.h
@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

-#ifndef __AMDBLOCKS_CHIP_H__
-#define __AMDBLOCKS_CHIP_H__
+#ifndef __AMD_BLOCK_CHIP_H__
+#define __AMD_BLOCK_CHIP_H__

 #include <amdblocks/espi.h>
 #include <amdblocks/spi.h>
@ -28,4 +28,4 @@ struct soc_amd_common_config {
 */
 const struct soc_amd_common_config *soc_get_common_config(void);

-#endif
+#endif /* __AMD_BLOCK_CHIP_H__ */
--- a/src/soc/amd/common/block/include/amdblocks/dimm_spd.h
+++ b/src/soc/amd/common/block/include/amdblocks/dimm_spd.h
@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

-#ifndef __DIMMSPD_H__
-#define __DIMMSPD_H__
+#ifndef __AMD_BLOCK_DIMM_SPD_H__
+#define __AMD_BLOCK_DIMM_SPD_H__

 #include <amdblocks/agesawrapper.h>
 #include <stddef.h>
@ -15,4 +15,4 @@
 int mainboard_read_spd(uint8_t spdAddress, char *buf, size_t len);
 int sb_read_spd(uint8_t spdAddress, char *buf, size_t len);

-#endif
+#endif /* __AMD_BLOCK_DIMM_SPD_H__ */
--- a/src/soc/amd/common/block/include/amdblocks/espi.h
+++ b/src/soc/amd/common/block/include/amdblocks/espi.h
@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

-#ifndef __AMDBLOCKS_ESPI_H__
-#define __AMDBLOCKS_ESPI_H__
+#ifndef __AMD_BLOCK_ESPI_H__
+#define __AMD_BLOCK_ESPI_H__

 #include <stdint.h>
 #include <stddef.h>
@ -118,4 +118,4 @@ void espi_update_static_bar(uintptr_t bar);
 */
 int espi_setup(void);

-#endif /* __AMDBLOCKS_ESPI_H__ */
+#endif /* __AMD_BLOCK_ESPI_H__ */
--- a/src/soc/amd/common/block/include/amdblocks/gpio_banks.h
+++ b/src/soc/amd/common/block/include/amdblocks/gpio_banks.h
@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

-#ifndef __AMDBLOCK_GPIO_BANKS_H__
-#define __AMDBLOCK_GPIO_BANKS_H__
+#ifndef __AMD_BLOCK_GPIO_BANKS_H__
+#define __AMD_BLOCK_GPIO_BANKS_H__

 #include <types.h>

@ -361,4 +361,4 @@ void soc_get_gpio_event_table(const struct soc_amd_event **table, size_t *items)
 /* May be implemented by soc to handle special cases */
 void soc_gpio_hook(uint8_t gpio, uint8_t mux);

-#endif /* __AMDBLOCK_GPIO_BANKS_H__ */
+#endif /* __AMD_BLOCK_GPIO_BANKS_H__ */
--- a/src/soc/amd/common/block/include/amdblocks/hda.h
+++ b/src/soc/amd/common/block/include/amdblocks/hda.h
@ -1,11 +1,11 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

-#ifndef __AMDBLOCKS_HDA_H__
-#define __AMDBLOCKS_HDA_H__
+#ifndef __AMD_BLOCK_HDA_H__
+#define __AMD_BLOCK_HDA_H__

 #include <device/device.h>

 /* SoC callback to add any quirks to HDA device node in SSDT. */
 void hda_soc_ssdt_quirks(const struct device *dev);

-#endif /* __AMDBLOCKS_HDA_H__ */
+#endif /* __AMD_BLOCK_HDA_H__ */
--- a/src/soc/amd/common/block/include/amdblocks/image.h
+++ b/src/soc/amd/common/block/include/amdblocks/image.h
@ -1,11 +1,11 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

-#ifndef __AMD_IMAGE_H__
-#define __AMD_IMAGE_H__
+#ifndef __AMD_BLOCK_IMAGE_H__
+#define __AMD_BLOCK_IMAGE_H__

 #include <stdint.h>

 void *amd_find_image(const void *start_address, const void *end_address,
 			uint32_t alignment, const char name[8]);

-#endif /* __AMD_IMAGE_H__ */
+#endif /* __AMD_BLOCK_IMAGE_H__ */
--- a/src/soc/amd/common/block/include/amdblocks/lpc.h
+++ b/src/soc/amd/common/block/include/amdblocks/lpc.h
@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

-#ifndef __AMDBLOCKS_LPC_H__
-#define __AMDBLOCKS_LPC_H__
+#ifndef __AMD_BLOCK_LPC_H__
+#define __AMD_BLOCK_LPC_H__

 #include <types.h>

@ -198,4 +198,4 @@ void lpc_set_spibase(uint32_t base);
 /* Enable SPI ROM (SPI_ROM_ENABLE, SPI_ROM_ALT_ENABLE) */
 void lpc_enable_spi_rom(uint32_t enable);

-#endif /* __AMDBLOCKS_LPC_H__ */
+#endif /* __AMD_BLOCK_LPC_H__ */
--- a/src/soc/amd/common/block/include/amdblocks/psp.h
+++ b/src/soc/amd/common/block/include/amdblocks/psp.h
@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

-#ifndef __AMD_PSP_H__
-#define __AMD_PSP_H__
+#ifndef __AMD_BLOCK_PSP_H__
+#define __AMD_BLOCK_PSP_H__

 /* Get the mailbox base address - specific to family of device. */
 void *soc_get_mbox_address(void);
@ -74,4 +74,4 @@ void psp_notify_sx_info(u8 sleep_type);

 int psp_load_named_blob(enum psp_blob_type type, const char *name);

-#endif /* __AMD_PSP_H__ */
+#endif /* __AMD_BLOCK_PSP_H__ */
--- a/src/soc/amd/common/block/include/amdblocks/reset.h
+++ b/src/soc/amd/common/block/include/amdblocks/reset.h
@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

-#ifndef __AMD_RESET_H__
-#define __AMD_RESET_H__
+#ifndef __AMD_BLOCK_RESET_H__
+#define __AMD_BLOCK_RESET_H__

 #include <console/console.h>
 #include <arch/cache.h>
@ -26,4 +26,4 @@ static inline __noreturn void cold_reset(void)
 	halt();
 }

-#endif /* __AMD_RESET_H__ */
+#endif /* __AMD_BLOCK_RESET_H__ */
--- a/src/soc/amd/common/block/include/amdblocks/s3_resume.h
+++ b/src/soc/amd/common/block/include/amdblocks/s3_resume.h
@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

-#ifndef __AMD_S3_RESUME_H__
-#define __AMD_S3_RESUME_H__
+#ifndef __AMD_BLOCK_S3_RESUME_H__
+#define __AMD_BLOCK_S3_RESUME_H__

 #include <agesa_headers.h>

@ -9,4 +9,4 @@ AGESA_STATUS OemInitResume(S3_DATA_BLOCK *dataBlock);
 AGESA_STATUS OemS3LateRestore(S3_DATA_BLOCK *dataBlock);
 AGESA_STATUS OemS3Save(S3_DATA_BLOCK *dataBlock);

-#endif /* __AMD_S3_RESUME_H__ */
+#endif /* __AMD_BLOCK_S3_RESUME_H__ */
--- a/src/soc/amd/common/block/include/amdblocks/sata.h
+++ b/src/soc/amd/common/block/include/amdblocks/sata.h
@ -1,10 +1,10 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

-#ifndef __AMDBLOCKS_SATA_H__
-#define __AMDBLOCKS_SATA_H__
+#ifndef __AMD_BLOCK_SATA_H__
+#define __AMD_BLOCK_SATA_H__

 #include <device/device.h>

 void soc_enable_sata_features(struct device *dev);

-#endif /* __AMDBLOCKS_SATA_H__ */
+#endif /* __AMD_BLOCK_SATA_H__ */
--- a/src/soc/amd/common/block/include/amdblocks/spi.h
+++ b/src/soc/amd/common/block/include/amdblocks/spi.h
@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

-#ifndef __AMDBLOCKS_SPI_H__
-#define __AMDBLOCKS_SPI_H__
+#ifndef __AMD_BLOCK_SPI_H__
+#define __AMD_BLOCK_SPI_H__

 #include <types.h>

@ -108,4 +108,4 @@ void spi_write8(uint8_t reg, uint8_t val);
 void spi_write16(uint8_t reg, uint16_t val);
 void spi_write32(uint8_t reg, uint32_t val);

-#endif /* __AMDBLOCKS_SPI_H__ */
+#endif /* __AMD_BLOCK_SPI_H__ */