Move SPI code out of board_enable.c where it started its life. The SPI
chip finding and SPI chip accessor code is moved as well. This can be split later if we feel like it. The non-use of svn cp is intentional because the only history we'd have to preserve are a few commits which were early prototypes of chip identification code. For those who intend to look at that history, they can look at board_enable.c revision 2853. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2857 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Carl-Daniel Hailfinger
Stefan Reinauer
parent
a3e03872f3
commit
a28edc524b
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@ -24,7 +24,7 @@ OBJS = chipset_enable.o board_enable.o udelay.o jedec.o sst28sf040.o \
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am29f040b.o mx29f002.o sst39sf020.o m29f400bt.o w49f002u.o \
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82802ab.o msys_doc.o pm49fl004.o sst49lf040.o sst49lfxxxc.o \
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sst_fwhub.o layout.o lbtable.o flashchips.o flashrom.o \
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sharplhf00l04.o w29ee011.o
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sharplhf00l04.o w29ee011.o spi.o
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all: pciutils dep $(PROGRAM)
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@ -30,176 +30,6 @@
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#include <string.h>
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#include "flash.h"
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#define ITE_SUPERIO_PORT1 0x2e
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#define ITE_SUPERIO_PORT2 0x4e
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#define JEDEC_RDID {0x9f}
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#define JEDEC_RDID_OUTSIZE 0x01
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#define JEDEC_RDID_INSIZE 0x03
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static uint16_t it8716f_flashport = 0;
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/* Generic Super I/O helper functions */
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uint8_t regval(uint16_t port, uint8_t reg)
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{
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outb(reg, port);
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return inb(port + 1);
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}
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void regwrite(uint16_t port, uint8_t reg, uint8_t val)
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{
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outb(reg, port);
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outb(val, port + 1);
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}
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/* Helper functions for most recent ITE IT87xx Super I/O chips */
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#define CHIP_ID_BYTE1_REG 0x20
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#define CHIP_ID_BYTE2_REG 0x21
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static void enter_conf_mode_ite(uint16_t port)
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{
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outb(0x87, port);
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outb(0x01, port);
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outb(0x55, port);
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if (port == ITE_SUPERIO_PORT1)
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outb(0x55, port);
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else
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outb(0xaa, port);
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}
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static void exit_conf_mode_ite(uint16_t port)
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{
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regwrite(port, 0x02, 0x02);
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}
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static uint16_t find_ite_serial_flash_port(uint16_t port)
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{
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uint8_t tmp = 0;
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uint16_t id, flashport = 0;
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enter_conf_mode_ite(port);
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id = regval(port, CHIP_ID_BYTE1_REG) << 8;
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id |= regval(port, CHIP_ID_BYTE2_REG);
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/* TODO: Handle more IT87xx if they support flash translation */
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if (id == 0x8716) {
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/* NOLDN, reg 0x24, mask out lowest bit (suspend) */
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tmp = regval(port, 0x24) & 0xFE;
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printf("Serial flash segment 0x%08x-0x%08x %sabled\n",
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0xFFFE0000, 0xFFFFFFFF, (tmp & 1 << 1) ? "en" : "dis");
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printf("Serial flash segment 0x%08x-0x%08x %sabled\n",
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0x000E0000, 0x000FFFFF, (tmp & 1 << 1) ? "en" : "dis");
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printf("Serial flash segment 0x%08x-0x%08x %sabled\n",
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0xFFEE0000, 0xFFEFFFFF, (tmp & 1 << 2) ? "en" : "dis");
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printf("Serial flash segment 0x%08x-0x%08x %sabled\n",
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0xFFF80000, 0xFFFEFFFF, (tmp & 1 << 3) ? "en" : "dis");
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printf("LPC write to serial flash %sabled\n",
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(tmp & 1 << 4) ? "en" : "dis");
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printf("serial flash pin %i\n", (tmp & 1 << 5) ? 87 : 29);
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/* LDN 0x7, reg 0x64/0x65 */
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regwrite(port, 0x07, 0x7);
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flashport = regval(port, 0x64) << 8;
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flashport |= regval(port, 0x65);
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}
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exit_conf_mode_ite(port);
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return flashport;
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}
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/* The IT8716F only supports commands with length 1,2,4,5 bytes including
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command byte and can not read more than 3 bytes from the device.
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This function expects writearr[0] to be the first byte sent to the device,
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whereas the IT8716F splits commands internally into address and non-address
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commands with the address in inverse wire order. That's why the register
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ordering in case 4 and 5 may seem strange. */
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static int it8716f_spi_command(uint16_t port, unsigned char writecnt, unsigned char readcnt, const unsigned char *writearr, unsigned char *readarr)
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{
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uint8_t busy, writeenc;
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do {
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busy = inb(port) & 0x80;
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} while (busy);
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if (readcnt > 3) {
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printf("%s called with unsupported readcnt %i\n",
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__FUNCTION__, readcnt);
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return 1;
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}
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switch (writecnt) {
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case 1:
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outb(writearr[0], port + 1);
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writeenc = 0x0;
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break;
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case 2:
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outb(writearr[0], port + 1);
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outb(writearr[1], port + 7);
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writeenc = 0x1;
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break;
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case 4:
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outb(writearr[0], port + 1);
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outb(writearr[1], port + 4);
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outb(writearr[2], port + 3);
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outb(writearr[3], port + 2);
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writeenc = 0x2;
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break;
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case 5:
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outb(writearr[0], port + 1);
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outb(writearr[1], port + 4);
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outb(writearr[2], port + 3);
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outb(writearr[3], port + 2);
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outb(writearr[4], port + 7);
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writeenc = 0x3;
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break;
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default:
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printf("%s called with unsupported writecnt %i\n",
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__FUNCTION__, writecnt);
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return 1;
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}
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/* Start IO, 33MHz, readcnt input bytes, writecnt output bytes. Note:
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* We can't use writecnt directly, but have to use a strange encoding
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*/
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outb((0x5 << 4) | ((readcnt & 0x3) << 2) | (writeenc), port);
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do {
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busy = inb(port) & 0x80;
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} while (busy);
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readarr[0] = inb(port + 5);
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readarr[1] = inb(port + 6);
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readarr[2] = inb(port + 7);
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return 0;
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}
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static int it8716f_serial_rdid(uint16_t port, unsigned char *readarr)
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{
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const unsigned char cmd[] = JEDEC_RDID;
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if (it8716f_spi_command(port, JEDEC_RDID_OUTSIZE, JEDEC_RDID_INSIZE, cmd, readarr))
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return 1;
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printf("RDID returned %02x %02x %02x\n", readarr[0], readarr[1], readarr[2]);
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return 0;
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}
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static int it87xx_probe_serial_flash(const char *name)
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{
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it8716f_flashport = find_ite_serial_flash_port(ITE_SUPERIO_PORT1);
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if (!it8716f_flashport)
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it8716f_flashport = find_ite_serial_flash_port(ITE_SUPERIO_PORT2);
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return (!it8716f_flashport);
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}
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int probe_spi(struct flashchip *flash)
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{
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unsigned char readarr[3];
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uint8_t manuf_id;
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uint16_t model_id;
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if (it8716f_flashport) {
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it8716f_serial_rdid(it8716f_flashport, readarr);
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manuf_id = readarr[0];
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model_id = (readarr[1] << 8) | readarr[2];
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printf_debug("%s: id1 0x%x, id2 0x%x\n", __FUNCTION__, manuf_id, model_id);
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if (manuf_id == flash->manufacture_id && model_id == flash->model_id)
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return 1;
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}
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return 0;
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}
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/*
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* Helper functions for many Winbond Super I/Os of the W836xx range.
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*/
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@ -207,7 +207,9 @@ int handle_romentries(uint8_t *buffer, uint8_t *content);
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int linuxbios_init(void);
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extern char *lb_part, *lb_vendor;
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/* spi.c */
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int probe_spi(struct flashchip *flash);
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int it87xx_probe_serial_flash(const char *name);
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/* 82802ab.c */
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int probe_82802ab(struct flashchip *flash);
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