drivers/pc80/rtc: Clean up some POST_CODE_EXTRA use

Change-Id: I5ecfa0860a28547f76a72592a8d07bca67822217
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38188
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Kyösti Mälkki 2020-01-04 13:51:16 +02:00 committed by Patrick Georgi
parent 10bc806ab3
commit a28ee1b186
2 changed files with 43 additions and 51 deletions

View File

@ -24,9 +24,7 @@ DECLARE_SPIN_LOCK(cmos_post_lock)
void cmos_post_log(void)
{
u8 code = 0;
#if CONFIG(CMOS_POST_EXTRA)
u32 extra = 0;
#endif
spin_lock(&cmos_post_lock);
@ -34,15 +32,13 @@ void cmos_post_log(void)
switch (cmos_read(CMOS_POST_BANK_OFFSET)) {
case CMOS_POST_BANK_0_MAGIC:
code = cmos_read(CMOS_POST_BANK_1_OFFSET);
#if CONFIG(CMOS_POST_EXTRA)
extra = cmos_read32(CMOS_POST_BANK_1_EXTRA);
#endif
if (CONFIG(CMOS_POST_EXTRA))
extra = cmos_read32(CMOS_POST_BANK_1_EXTRA);
break;
case CMOS_POST_BANK_1_MAGIC:
code = cmos_read(CMOS_POST_BANK_0_OFFSET);
#if CONFIG(CMOS_POST_EXTRA)
extra = cmos_read32(CMOS_POST_BANK_0_EXTRA);
#endif
if (CONFIG(CMOS_POST_EXTRA))
extra = cmos_read32(CMOS_POST_BANK_0_EXTRA);
break;
}
@ -60,10 +56,8 @@ void cmos_post_log(void)
"in previous boot: 0x%02x\n", code);
#if CONFIG(ELOG) && (ENV_RAMSTAGE || CONFIG(ELOG_PRERAM))
elog_add_event_word(ELOG_TYPE_LAST_POST_CODE, code);
#if CONFIG(CMOS_POST_EXTRA)
if (extra)
if (CONFIG(CMOS_POST_EXTRA) && extra)
elog_add_event_dword(ELOG_TYPE_POST_EXTRA, extra);
#endif
#endif
}
}
@ -83,49 +77,15 @@ void cmos_post_init(void)
/* Initialize to zero */
cmos_write(0, CMOS_POST_BANK_0_OFFSET);
cmos_write(0, CMOS_POST_BANK_1_OFFSET);
#if CONFIG(CMOS_POST_EXTRA)
cmos_write32(0, CMOS_POST_BANK_0_EXTRA);
cmos_write32(0, CMOS_POST_BANK_1_EXTRA);
#endif
if (CONFIG(CMOS_POST_EXTRA)) {
cmos_write32(0, CMOS_POST_BANK_0_EXTRA);
cmos_write32(0, CMOS_POST_BANK_1_EXTRA);
}
}
cmos_write(magic, CMOS_POST_BANK_OFFSET);
}
#if CONFIG(CMOS_POST_EXTRA)
void post_log_extra(u32 value)
{
spin_lock(&cmos_post_lock);
switch (cmos_read(CMOS_POST_BANK_OFFSET)) {
case CMOS_POST_BANK_0_MAGIC:
cmos_write32(value, CMOS_POST_BANK_0_EXTRA);
break;
case CMOS_POST_BANK_1_MAGIC:
cmos_write32(value, CMOS_POST_BANK_1_EXTRA);
break;
}
spin_unlock(&cmos_post_lock);
}
void post_log_path(const struct device *dev)
{
if (dev) {
/* Encode path into lower 3 bytes */
u32 path = dev_path_encode(dev);
/* Upper byte contains the log type */
path |= CMOS_POST_EXTRA_DEV_PATH << 24;
post_log_extra(path);
}
}
void post_log_clear(void)
{
post_log_extra(0);
}
#endif /* CONFIG_CMOS_POST_EXTRA */
void cmos_post_code(u8 value)
{
spin_lock(&cmos_post_lock);
@ -141,3 +101,37 @@ void cmos_post_code(u8 value)
spin_unlock(&cmos_post_lock);
}
static void __unused cmos_post_extra(u32 value)
{
spin_lock(&cmos_post_lock);
switch (cmos_read(CMOS_POST_BANK_OFFSET)) {
case CMOS_POST_BANK_0_MAGIC:
cmos_write32(value, CMOS_POST_BANK_0_EXTRA);
break;
case CMOS_POST_BANK_1_MAGIC:
cmos_write32(value, CMOS_POST_BANK_1_EXTRA);
break;
}
spin_unlock(&cmos_post_lock);
}
#if CONFIG(CMOS_POST_EXTRA)
void post_log_path(const struct device *dev)
{
if (dev) {
/* Encode path into lower 3 bytes */
u32 path = dev_path_encode(dev);
/* Upper byte contains the log type */
path |= CMOS_POST_EXTRA_DEV_PATH << 24;
cmos_post_extra(path);
}
}
void post_log_clear(void)
{
cmos_post_extra(0);
}
#endif /* CONFIG_CMOS_POST_EXTRA */

View File

@ -32,12 +32,10 @@ void post_code(u8 value);
void arch_post_code(u8 value);
void cmos_post_code(u8 value);
#if CONFIG(CMOS_POST_EXTRA)
void post_log_extra(u32 value);
struct device;
void post_log_path(const struct device *dev);
void post_log_clear(void);
#else
#define post_log_extra(x) do {} while (0)
#define post_log_path(x) do {} while (0)
#define post_log_clear() do {} while (0)
#endif