soc/mediatek/mt8186: Enable CPU power hardware tracking for PMIC MT6366

1. There are two power sources for CPU:
   - Logic power (VPROC).
   - SRAM power (VSRAM_PROC).
2. There is a constraint between VPROC and VSRAM_PROC:
   - 0mV <= VSRAM_PROC - VPROC <= 250mV.

With software control, the constraint might not always hold. Therefore,
we enable hardware tracking from PMIC MT6366 to ensure the constraint
is met automatically.

BUG=b:236353282, b:241615706
TEST=meet the constrain correctly when adjusting the voltage.

Signed-off-by: Sen Chu <sen.chu@mediatek.corp-partner.google.com>
Change-Id: I6012c57e60c009f1d599b57aab1c2526ee789208
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67436
Reviewed-by: Yidi Lin <yidilin@google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Sen Chu 2022-09-05 19:19:48 +08:00 committed by Felix Held
parent ad0288a843
commit a292f41fae
1 changed files with 9 additions and 0 deletions

View File

@ -159,6 +159,15 @@ static struct pmic_setting init_setting[] = {
{0x1A56, 0x7FFF, 0x7FFF, 0},
{0x1B48, 0x10, 0x7F, 0},
{0x1B4A, 0xF15, 0x7F7F, 0},
/* Enable HW Tracking */
{0x1B66, 0x10, 0x7F, 8},
{0x1B68, 0x38, 0x7F, 0},
{0x1B68, 0x63, 0x7F, 8},
{0x1B64, 0x6, 0x7, 0},
{0x1B6E, 0x10, 0x7F, 8},
{0x1B70, 0x38, 0x7F, 0},
{0x1B70, 0x63, 0x7F, 8},
{0x1B6C, 0x6, 0x7, 0},
{0x1B8A, 0x10, 0x7F, 0},
{0x1B8C, 0xF15, 0x7F7F, 0},
{0x1BA8, 0x10, 0x7F, 0},