soc/intel/alderlake: Add DPTF HIDs for Alder Lake SoC

Add DPTF HIDs for thermal funcitonality for Alder Lake SoC.

BRANCH=None
BUG=None
TEST=Built and tested on adlrvp board

Change-Id: I8de58497fa800690d04abbdfe4d6abf1c0184334
Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52268
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/intel/alderlake/Makefile.inc

@@ -30,6 +30,7 @@ romstage-y += reset.c
 ramstage-y += acpi.c
 ramstage-y += chip.c
 ramstage-y += cpu.c
+ramstage-y += dptf.c
 ramstage-y += elog.c
 ramstage-y += espi.c
 ramstage-y += finalize.c

src/soc/intel/alderlake/dptf.c

@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <drivers/intel/dptf/dptf.h>
+
+static const struct dptf_platform_info adl_dptf_platform_info = {
+	.use_eisa_hids = false,
+	/* _HID for the toplevel DPTF device, typically \_SB.DPTF */
+	.dptf_device_hid = "INTC1041",
+	/* _HID for Intel DPTF Generic Device (these require PTYP as well) */
+	.generic_hid = "INTC1046",
+	/* _HID for Intel DPTF Fan Device */
+	.fan_hid = "INTC1048",
+};
+
+const struct dptf_platform_info *get_dptf_platform_info(void)
+{
+	return &adl_dptf_platform_info;
+}