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Allow to build romstage sources inside the bootblock 

Having a separate romstage is only desirable:
 - with advanced setups like vboot or normal/fallback
 - boot medium is slow at startup (some ARM SOCs)
 - bootblock is limited in size (Intel APL 32K)

When this is not the case there is no need for the extra complexity
that romstage brings. Including the romstage sources inside the
bootblock substantially reduces the total code footprint. Often the
resulting code is 10-20k smaller.

This is controlled via a Kconfig option.

TESTED: works on qemu x86, arm and aarch64 with and without VBOOT.

Change-Id: Id68390edc1ba228b121cca89b80c64a92553e284
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55068
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Arthur Heymans 2021-05-29 08:10:49 +02:00 committed by Felix Held
parent 4ce52f622e
commit a2bc2540c2
46 changed files with 118 additions and 66 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
Makefile.inc
View File

@ -1250,6 +1250,7 @@ ifeq ($(CONFIG_CBFS_VERIFICATION),y)
fi
endif # CONFIG_CBFS_VERIFICATION
ifeq ($(CONFIG_SEPARATE_ROMSTAGE),y)
cbfs-files-y += $(CONFIG_CBFS_PREFIX)/romstage
$(CONFIG_CBFS_PREFIX)/romstage-file := $(objcbfs)/romstage.elf
$(CONFIG_CBFS_PREFIX)/romstage-type := stage
@ -1288,6 +1289,9 @@ endif # CONFIG_ARCH_ROMSTAGE_X86_32 / CONFIG_ARCH_ROMSTAGE_X86_64
ifeq ($(CONFIG_VBOOT_STARTS_IN_ROMSTAGE),y)
$(CONFIG_CBFS_PREFIX)/romstage-options += $(TXTIBB)
endif
else # CONFIG_SEPARATE_ROMSTAGE
postinclude-hooks += $$(eval bootblock-srcs += $$(romstage-srcs))
endif
cbfs-files-$(CONFIG_HAVE_RAMSTAGE) += $(CONFIG_CBFS_PREFIX)/ramstage
$(CONFIG_CBFS_PREFIX)/ramstage-file := $(RAMSTAGE)

9
src/Kconfig
View File

@ -243,6 +243,14 @@ config COMPRESS_BOOTBLOCK
user-selectable. (There's no real point in offering this to the user
anyway... if it works and saves boot time, you would always want it.)
config SEPARATE_ROMSTAGE
bool "Build a separate romstage"
default y
help
Build a separate romstage that is loaded by bootblock. With this
option disabled the romstage sources are linked inside the bootblock
as a single stage.
config INCLUDE_CONFIG_FILE
bool "Include the coreboot .config file into the ROM image"
# Default value set at the end of the file
@ -1523,6 +1531,7 @@ config HAVE_VERSTAGE
config HAVE_ROMSTAGE
bool
depends on SEPARATE_ROMSTAGE
default y
config HAVE_RAMSTAGE

2
src/arch/arm64/romstage.c
View File

@ -11,6 +11,7 @@
__weak void platform_romstage_main(void) { /* no-op, for bring-up */ }
__weak void platform_romstage_postram(void) { /* no-op */ }
#if CONFIG(SEPARATE_ROMSTAGE)
void main(void)
{
timestamp_add_now(TS_ROMSTAGE_START);
@ -20,6 +21,7 @@ void main(void)
exception_init();
romstage_main();
}
#endif
void __noreturn romstage_main(void)
{

6
src/arch/x86/Makefile.inc
View File

@ -161,12 +161,12 @@ endif # CONFIG_ARCH_VERSTAGE_X86_32 / CONFIG_ARCH_VERSTAGE_X86_64
ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32)$(CONFIG_ARCH_ROMSTAGE_X86_64),y)
romstage-y += assembly_entry.S
romstage-y += romstage.c
romstage-$(CONFIG_SEPARATE_ROMSTAGE) += assembly_entry.S
romstage-$(CONFIG_SEPARATE_ROMSTAGE) += romstage.c
romstage-y += boot.c
romstage-$(CONFIG_DEBUG_HW_BREAKPOINTS_IN_ALL_STAGES) += breakpoint.c
romstage-y += post.c
romstage-y += gdt_init.S
romstage-$(CONFIG_SEPARATE_ROMSTAGE) += gdt_init.S
romstage-y += cpu_common.c
romstage-$(CONFIG_IDT_IN_EVERY_STAGE) += exception.c
romstage-$(CONFIG_IDT_IN_EVERY_STAGE) += idt.S

2
src/arch/x86/assembly_entry.S
View File

@ -53,7 +53,7 @@ _start:
#endif
#if ((ENV_SEPARATE_VERSTAGE && CONFIG(VERSTAGE_DEBUG_SPINLOOP)) \
|| (ENV_ROMSTAGE && CONFIG(ROMSTAGE_DEBUG_SPINLOOP)))
|| (ENV_SEPARATE_ROMSTAGE && CONFIG(ROMSTAGE_DEBUG_SPINLOOP)))
/* Wait for a JTAG debugger to break in and set EBX non-zero */
xor %ebx, %ebx

4
src/arch/x86/car.ld
View File

@ -75,7 +75,7 @@
RECORD_SIZE(bss)
#endif
#if ENV_ROMSTAGE && CONFIG(ASAN_IN_ROMSTAGE)
#if ENV_SEPARATE_ROMSTAGE && CONFIG(ASAN_IN_ROMSTAGE)
_shadow_size = (_ebss - _car_region_start) >> 3;
REGION(asan_shadow, ., _shadow_size, ARCH_POINTER_ALIGN_SIZE)
#endif
@ -144,7 +144,7 @@ _bogus = ASSERT((CONFIG_DCACHE_RAM_SIZE == 0) || (SIZEOF(.car.data) <= CONFIG_DC
_bogus2 = ASSERT(_pagetables == ALIGN(_pagetables, 4096), "_pagetables aren't 4KiB aligned");
#endif
_bogus3 = ASSERT(CONFIG_DCACHE_BSP_STACK_SIZE > 0x0, "BSP stack size not configured");
#if CONFIG(NO_XIP_EARLY_STAGES) && (ENV_ROMSTAGE || ENV_SEPARATE_VERSTAGE)
#if CONFIG(NO_XIP_EARLY_STAGES) && (ENV_SEPARATE_ROMSTAGE || ENV_SEPARATE_VERSTAGE)
_bogus4 = ASSERT(_eprogram <= _car_region_end, "Stage end too high !");
_bogus5 = ASSERT(_program >= _car_unallocated_start, "Stage start too low!");
#endif

2
src/arch/x86/memcpy.c
View File

@ -8,7 +8,7 @@ void *memcpy(void *dest, const void *src, size_t n)
{
unsigned long d0, d1, d2;
#if (ENV_ROMSTAGE && CONFIG(ASAN_IN_ROMSTAGE)) || \
#if (ENV_SEPARATE_ROMSTAGE && CONFIG(ASAN_IN_ROMSTAGE)) || \
(ENV_RAMSTAGE && CONFIG(ASAN_IN_RAMSTAGE))
check_memory_region((unsigned long)src, n, false, _RET_IP_);
check_memory_region((unsigned long)dest, n, true, _RET_IP_);

2
src/arch/x86/memlayout.ld
View File

@ -26,7 +26,7 @@ SECTIONS
/* Relocated at runtime in cbmem so the address does not matter. */
RAMSTAGE(64M, 8M)
#elif ENV_ROMSTAGE
#elif ENV_SEPARATE_ROMSTAGE
/* The 1M size is not allocated. It's just for basic size checking.
* Link at 32MiB address and rely on cbfstool to relocate to XIP. */
ROMSTAGE(CONFIG_ROMSTAGE_ADDR, 1M)

2
src/arch/x86/memmove_32.c
View File

@ -12,7 +12,7 @@ void *memmove(void *dest, const void *src, size_t n)
int d0, d1, d2, d3, d4, d5;
char *ret = dest;
#if (ENV_ROMSTAGE && CONFIG(ASAN_IN_ROMSTAGE)) || \
#if (ENV_SEPARATE_ROMSTAGE && CONFIG(ASAN_IN_ROMSTAGE)) || \
(ENV_RAMSTAGE && CONFIG(ASAN_IN_RAMSTAGE))
check_memory_region((unsigned long)src, n, false, _RET_IP_);
check_memory_region((unsigned long)dest, n, true, _RET_IP_);

2
src/arch/x86/memset.c
View File

@ -14,7 +14,7 @@ void *memset(void *dstpp, int c, size_t len)
int d0;
unsigned long int dstp = (unsigned long int)dstpp;
#if (ENV_ROMSTAGE && CONFIG(ASAN_IN_ROMSTAGE)) || \
#if (ENV_SEPARATE_ROMSTAGE && CONFIG(ASAN_IN_ROMSTAGE)) || \
(ENV_RAMSTAGE && CONFIG(ASAN_IN_RAMSTAGE))
check_memory_region((unsigned long)dstpp, len, true, _RET_IP_);
#endif

2
src/commonlib/storage/sdhci.c
View File

@ -18,7 +18,7 @@
#define DMA_AVAILABLE ((CONFIG(SDHCI_ADMA_IN_BOOTBLOCK) && ENV_BOOTBLOCK) \
|| (CONFIG(SDHCI_ADMA_IN_VERSTAGE) && ENV_SEPARATE_VERSTAGE) \
|| (CONFIG(SDHCI_ADMA_IN_ROMSTAGE) && ENV_ROMSTAGE) \
|| (CONFIG(SDHCI_ADMA_IN_ROMSTAGE) && ENV_SEPARATE_ROMSTAGE) \
|| ENV_POSTCAR || ENV_RAMSTAGE)
__weak void *dma_malloc(size_t length_in_bytes)

1
src/console/Kconfig
View File

@ -2,6 +2,7 @@ menu "Console"
config NO_BOOTBLOCK_CONSOLE
bool
depends on SEPARATE_ROMSTAGE
config BOOTBLOCK_CONSOLE
bool "Enable early (bootblock) console output."

4
src/console/init.c
View File

@ -9,7 +9,7 @@
#include <option.h>
#include <version.h>
#define FIRST_CONSOLE (ENV_BOOTBLOCK || (CONFIG(NO_BOOTBLOCK_CONSOLE) && ENV_ROMSTAGE))
#define FIRST_CONSOLE (ENV_BOOTBLOCK || (CONFIG(NO_BOOTBLOCK_CONSOLE) && ENV_SEPARATE_ROMSTAGE))
static int console_inited;
static int console_loglevel;
@ -53,7 +53,7 @@ void console_init(void)
if (CONFIG(DEBUG_CONSOLE_INIT))
console_inited = 1;
if (CONFIG(EARLY_PCI_BRIDGE) && (ENV_BOOTBLOCK || ENV_ROMSTAGE))
if (CONFIG(EARLY_PCI_BRIDGE) && (ENV_BOOTBLOCK || ENV_SEPARATE_ROMSTAGE))
pci_early_bridge_init();
console_hw_init();

2
src/cpu/x86/cache/cache.c vendored
View File

@ -33,7 +33,7 @@ void arch_segment_loaded(uintptr_t start, size_t size, int flags)
to make sure that our code hits dram during romstage. */
if (!ENV_CACHE_AS_RAM)
return;
if (!ENV_ROMSTAGE)
if (!ENV_RAMINIT)
return;
if (!CONFIG(POSTCAR_STAGE))
return;

2
src/drivers/siemens/nc_fpga/nc_fpga_early.c
View File

@ -42,7 +42,7 @@ void nc_fpga_post(uint8_t value)
/* The function pci_early_device_probe is called in bootblock and romstage. Make sure
that in these stages the initialization code was successful before the POST code
value is written to the register. */
if ((ENV_BOOTBLOCK || ENV_ROMSTAGE) && nc_fpga_present == false)
if ((ENV_BOOTBLOCK || ENV_SEPARATE_ROMSTAGE) && nc_fpga_present == false)
return;
write32p(fpga_bar + NC_FPGA_POST_OFFSET, value);
}

4
src/drivers/usb/ehci_debug.c
View File

@ -53,7 +53,7 @@ static inline struct ehci_debug_info *dbgp_ehci_info(void)
{
if (glob_dbg_info_p == NULL) {
struct ehci_debug_info *info;
if (ENV_BOOTBLOCK || ENV_SEPARATE_VERSTAGE || ENV_ROMSTAGE) {
if (ENV_BOOTBLOCK || ENV_SEPARATE_VERSTAGE || ENV_SEPARATE_ROMSTAGE) {
/* The message likely does not show if we hit this. */
if (sizeof(*info) > _car_ehci_dbg_info_size)
die("BUG: Increase ehci_dbg_info reserve in CAR");
@ -730,7 +730,7 @@ void usbdebug_init(void)
* from CBMEM.
*/
if (CONFIG(USBDEBUG_IN_PRE_RAM)
&& (ENV_ROMSTAGE || ENV_BOOTBLOCK))
&& (ENV_SEPARATE_ROMSTAGE || ENV_BOOTBLOCK))
usbdebug_hw_init(false);
/* USB console init is done early in ramstage if it was

2
src/include/console/cbmem_console.h
View File

@ -10,7 +10,7 @@ void cbmemc_tx_byte(unsigned char data);
#define __CBMEM_CONSOLE_ENABLE__ (CONFIG(CONSOLE_CBMEM) && \
(ENV_RAMSTAGE || ENV_SEPARATE_VERSTAGE || ENV_POSTCAR || \
ENV_ROMSTAGE || (ENV_BOOTBLOCK && CONFIG(BOOTBLOCK_CONSOLE)) || \
ENV_SEPARATE_ROMSTAGE || (ENV_BOOTBLOCK && CONFIG(BOOTBLOCK_CONSOLE)) || \
(ENV_SMM && CONFIG(DEBUG_SMI))))
#if __CBMEM_CONSOLE_ENABLE__

2
src/include/console/console.h
View File

@ -44,7 +44,7 @@ static inline int get_console_loglevel(void)
#define __CONSOLE_ENABLE__ \
((ENV_BOOTBLOCK && CONFIG(BOOTBLOCK_CONSOLE)) || \
(ENV_POSTCAR && CONFIG(POSTCAR_CONSOLE)) || \
ENV_SEPARATE_VERSTAGE || ENV_ROMSTAGE || ENV_RAMSTAGE || \
ENV_SEPARATE_VERSTAGE || ENV_SEPARATE_ROMSTAGE || ENV_RAMSTAGE || \
ENV_LIBAGESA || (ENV_SMM && CONFIG(DEBUG_SMI)))
#if __CONSOLE_ENABLE__

2
src/include/console/qemu_debugcon.h
View File

@ -9,7 +9,7 @@ void qemu_debugcon_init(void);
void qemu_debugcon_tx_byte(unsigned char data);
#if CONFIG(CONSOLE_QEMU_DEBUGCON) && \
(ENV_ROMSTAGE || ENV_RAMSTAGE || ENV_POSTCAR || ENV_BOOTBLOCK)
(ENV_SEPARATE_ROMSTAGE || ENV_RAMSTAGE || ENV_POSTCAR || ENV_BOOTBLOCK)
static inline void __qemu_debugcon_init(void) { qemu_debugcon_init(); }
static inline void __qemu_debugcon_tx_byte(u8 data)
{

2
src/include/console/system76_ec.h
View File

@ -11,7 +11,7 @@ void system76_ec_flush(void);
void system76_ec_print(uint8_t byte);
#define __CONSOLE_SYSTEM76_EC_ENABLE__ (CONFIG(CONSOLE_SYSTEM76_EC) && \
(ENV_BOOTBLOCK || ENV_ROMSTAGE || ENV_RAMSTAGE \
(ENV_BOOTBLOCK || ENV_SEPARATE_ROMSTAGE || ENV_RAMSTAGE \
|| ENV_SEPARATE_VERSTAGE || ENV_POSTCAR \
|| (ENV_SMM && CONFIG(DEBUG_SMI))))

2
src/include/console/uart.h
View File

@ -62,7 +62,7 @@ static inline void *uart_platform_baseptr(unsigned int idx)
void oxford_remap(unsigned int new_base);
#define __CONSOLE_SERIAL_ENABLE__ (CONFIG(CONSOLE_SERIAL) && \
(ENV_BOOTBLOCK || ENV_ROMSTAGE || ENV_RAMSTAGE || ENV_SEPARATE_VERSTAGE \
(ENV_BOOTBLOCK || ENV_SEPARATE_ROMSTAGE || ENV_RAMSTAGE || ENV_SEPARATE_VERSTAGE \
|| ENV_POSTCAR || (ENV_SMM && CONFIG(DEBUG_SMI))))
#if __CONSOLE_SERIAL_ENABLE__

2
src/include/console/usb.h
View File

@ -15,7 +15,7 @@ int usb_can_rx_byte(int idx);
#define __CONSOLE_USB_ENABLE__ (CONFIG(CONSOLE_USB) && \
((ENV_BOOTBLOCK && CONFIG(USBDEBUG_IN_PRE_RAM)) || \
(ENV_ROMSTAGE && CONFIG(USBDEBUG_IN_PRE_RAM)) || \
(ENV_SEPARATE_ROMSTAGE && CONFIG(USBDEBUG_IN_PRE_RAM)) || \
(ENV_POSTCAR && CONFIG(USBDEBUG_IN_PRE_RAM)) || \
(ENV_SEPARATE_VERSTAGE && CONFIG(USBDEBUG_IN_PRE_RAM)) || \
ENV_RAMSTAGE))

2
src/include/memlayout.h
View File

@ -134,7 +134,7 @@
REGION(bootblock, addr, sz, 1)
#endif
#if ENV_ROMSTAGE
#if ENV_SEPARATE_ROMSTAGE
#define ROMSTAGE(addr, sz) \
SYMBOL(romstage, addr) \
_eromstage = ABSOLUTE(_romstage + sz); \

32
src/include/rules.h
View File

@ -22,7 +22,7 @@
#if defined(__DECOMPRESSOR__)
#define ENV_DECOMPRESSOR 1
#define ENV_BOOTBLOCK 0
#define ENV_ROMSTAGE 0
#define ENV_SEPARATE_ROMSTAGE 0
#define ENV_RAMSTAGE 0
#define ENV_SMM 0
#define ENV_SEPARATE_VERSTAGE 0
@ -34,7 +34,7 @@
#elif defined(__BOOTBLOCK__)
#define ENV_DECOMPRESSOR 0
#define ENV_BOOTBLOCK 1
#define ENV_ROMSTAGE 0
#define ENV_SEPARATE_ROMSTAGE 0
#define ENV_RAMSTAGE 0
#define ENV_SMM 0
#define ENV_SEPARATE_VERSTAGE 0
@ -46,7 +46,7 @@
#elif defined(__ROMSTAGE__)
#define ENV_DECOMPRESSOR 0
#define ENV_BOOTBLOCK 0
#define ENV_ROMSTAGE 1
#define ENV_SEPARATE_ROMSTAGE 1
#define ENV_RAMSTAGE 0
#define ENV_SMM 0
#define ENV_SEPARATE_VERSTAGE 0
@ -58,7 +58,7 @@
#elif defined(__SMM__)
#define ENV_DECOMPRESSOR 0
#define ENV_BOOTBLOCK 0
#define ENV_ROMSTAGE 0
#define ENV_SEPARATE_ROMSTAGE 0
#define ENV_RAMSTAGE 0
#define ENV_SMM 1
#define ENV_SEPARATE_VERSTAGE 0
@ -72,13 +72,13 @@
* bootblock/romstage, depending on the setting of the VBOOT_SEPARATE_VERSTAGE
* kconfig option. The ENV_SEPARATE_VERSTAGE macro will only return true for
* "verstage" code when CONFIG(VBOOT_SEPARATE_VERSTAGE) is true, otherwise that
* code will have ENV_BOOTBLOCK or ENV_ROMSTAGE set (depending on the
* code will have ENV_BOOTBLOCK or ENV_SEPARATE_ROMSTAGE set (depending on the
* "VBOOT_STARTS_IN_"... kconfig options).
*/
#elif defined(__VERSTAGE__)
#define ENV_DECOMPRESSOR 0
#define ENV_BOOTBLOCK 0
#define ENV_ROMSTAGE 0
#define ENV_SEPARATE_ROMSTAGE 0
#define ENV_RAMSTAGE 0
#define ENV_SMM 0
#define ENV_SEPARATE_VERSTAGE 1
@ -94,7 +94,7 @@
#elif defined(__RAMSTAGE__)
#define ENV_DECOMPRESSOR 0
#define ENV_BOOTBLOCK 0
#define ENV_ROMSTAGE 0
#define ENV_SEPARATE_ROMSTAGE 0
#define ENV_RAMSTAGE 1
#define ENV_SMM 0
#define ENV_SEPARATE_VERSTAGE 0
@ -106,7 +106,7 @@
#elif defined(__RMODULE__)
#define ENV_DECOMPRESSOR 0
#define ENV_BOOTBLOCK 0
#define ENV_ROMSTAGE 0
#define ENV_SEPARATE_ROMSTAGE 0
#define ENV_RAMSTAGE 0
#define ENV_SMM 0
#define ENV_SEPARATE_VERSTAGE 0
@ -118,7 +118,7 @@
#elif defined(__POSTCAR__)
#define ENV_DECOMPRESSOR 0
#define ENV_BOOTBLOCK 0
#define ENV_ROMSTAGE 0
#define ENV_SEPARATE_ROMSTAGE 0
#define ENV_RAMSTAGE 0
#define ENV_SMM 0
#define ENV_SEPARATE_VERSTAGE 0
@ -130,7 +130,7 @@
#elif defined(__LIBAGESA__)
#define ENV_DECOMPRESSOR 0
#define ENV_BOOTBLOCK 0
#define ENV_ROMSTAGE 0
#define ENV_SEPARATE_ROMSTAGE 0
#define ENV_RAMSTAGE 0
#define ENV_SMM 0
#define ENV_SEPARATE_VERSTAGE 0
@ -146,7 +146,7 @@
*/
#define ENV_DECOMPRESSOR 0
#define ENV_BOOTBLOCK 0
#define ENV_ROMSTAGE 0
#define ENV_SEPARATE_ROMSTAGE 0
#define ENV_RAMSTAGE 0
#define ENV_SMM 0
#define ENV_SEPARATE_VERSTAGE 0
@ -268,7 +268,7 @@
#endif
#define ENV_ROMSTAGE_OR_BEFORE \
(ENV_DECOMPRESSOR || ENV_BOOTBLOCK || ENV_ROMSTAGE || \
(ENV_DECOMPRESSOR || ENV_BOOTBLOCK || ENV_SEPARATE_ROMSTAGE || \
(ENV_SEPARATE_VERSTAGE && !CONFIG(VBOOT_STARTS_IN_ROMSTAGE)))
#if ENV_X86
@ -299,9 +299,9 @@
#define ENV_INITIAL_STAGE ENV_BOOTBLOCK
#endif
#define ENV_CREATES_CBMEM ENV_ROMSTAGE
#define ENV_HAS_CBMEM (ENV_ROMSTAGE | ENV_POSTCAR | ENV_RAMSTAGE)
#define ENV_RAMINIT ENV_ROMSTAGE
#define ENV_CREATES_CBMEM (ENV_SEPARATE_ROMSTAGE || (ENV_BOOTBLOCK && !CONFIG(SEPARATE_ROMSTAGE)))
#define ENV_HAS_CBMEM (ENV_CREATES_CBMEM || ENV_POSTCAR || ENV_RAMSTAGE)
#define ENV_RAMINIT (ENV_SEPARATE_ROMSTAGE || (ENV_BOOTBLOCK && !CONFIG(SEPARATE_ROMSTAGE)))
#if ENV_X86
#define ENV_HAS_SPINLOCKS !ENV_ROMSTAGE_OR_BEFORE
@ -314,7 +314,7 @@
/* When set <arch/smp/spinlock.h> is included for the spinlock implementation. */
#define ENV_SUPPORTS_SMP (CONFIG(SMP) && ENV_HAS_SPINLOCKS)
#if ENV_X86 && CONFIG(COOP_MULTITASKING) && (ENV_RAMSTAGE || ENV_ROMSTAGE)
#if ENV_X86 && CONFIG(COOP_MULTITASKING) && (ENV_RAMSTAGE || ENV_CREATES_CBMEM)
/* TODO: Enable in all x86 stages */
#define ENV_SUPPORTS_COOP 1
#else

2
src/include/symbols.h
View File

@ -39,7 +39,7 @@ DECLARE_REGION(cbfs_mcache)
DECLARE_REGION(fmap_cache)
DECLARE_REGION(tpm_log)
#if ENV_ROMSTAGE && CONFIG(ASAN_IN_ROMSTAGE)
#if ENV_SEPARATE_ROMSTAGE && CONFIG(ASAN_IN_ROMSTAGE)
DECLARE_REGION(bss)
DECLARE_REGION(asan_shadow)
#endif

2
src/include/timestamp.h
View File

@ -11,7 +11,7 @@
* timestamp_init() needs to be called once in *one* of the ENV_ROMSTAGE_OR_BEFORE
* stages (bootblock, romstage, verstage, etc). It's up to the chipset/arch
* to make the call in the earliest stage, otherwise some timestamps will be lost.
* For x86 ENV_ROMSTAGE call must be made before CAR is torn down.
* For x86 ENV_BOOTBLOCK / ENV_SEPARATE_ROMSTAGE call must be made before CAR is torn down.
*/
void timestamp_init(uint64_t base);
/*

10
src/lib/asan.c
View File

@ -16,7 +16,7 @@
static inline void *asan_mem_to_shadow(const void *addr)
{
#if ENV_ROMSTAGE
#if ENV_SEPARATE_ROMSTAGE
return (void *)((uintptr_t)&_asan_shadow + (((uintptr_t)addr -
(uintptr_t)&_car_region_start) >> ASAN_SHADOW_SCALE_SHIFT));
#elif ENV_RAMSTAGE
@ -27,7 +27,7 @@ static inline void *asan_mem_to_shadow(const void *addr)
static inline const void *asan_shadow_to_mem(const void *shadow_addr)
{
#if ENV_ROMSTAGE
#if ENV_SEPARATE_ROMSTAGE
return (void *)((uintptr_t)&_car_region_start + (((uintptr_t)shadow_addr -
(uintptr_t)&_asan_shadow) << ASAN_SHADOW_SCALE_SHIFT));
#elif ENV_RAMSTAGE
@ -237,7 +237,7 @@ static __always_inline void check_memory_region_inline(unsigned long addr,
size_t size, bool write,
unsigned long ret_ip)
{
#if ENV_ROMSTAGE
#if ENV_SEPARATE_ROMSTAGE
if (((uintptr_t)addr < (uintptr_t)&_car_region_start) ||
((uintptr_t)addr > (uintptr_t)&_ebss))
return;
@ -269,7 +269,7 @@ void check_memory_region(unsigned long addr, size_t size, bool write,
uintptr_t __asan_shadow_offset(uintptr_t addr)
{
#if ENV_ROMSTAGE
#if ENV_SEPARATE_ROMSTAGE
return (uintptr_t)&_asan_shadow - (((uintptr_t)&_car_region_start) >>
ASAN_SHADOW_SCALE_SHIFT);
#elif ENV_RAMSTAGE
@ -323,7 +323,7 @@ static void asan_ctors(void)
void asan_init(void)
{
#if ENV_ROMSTAGE
#if ENV_SEPARATE_ROMSTAGE
size_t size = (size_t)&_ebss - (size_t)&_car_region_start;
asan_unpoison_shadow((void *)&_car_region_start, size);
#elif ENV_RAMSTAGE

25
src/lib/cbfs.c
View File

@ -141,16 +141,21 @@ static inline bool cbfs_lzma_enabled(void)
return true;
if (fspm_env() && CONFIG(FSP_COMPRESS_FSP_M_LZMA))
return true;
/* We assume here romstage and postcar are never compressed. */
if (ENV_BOOTBLOCK || ENV_SEPARATE_VERSTAGE)
/* Payload loader (ramstage) always needs LZMA. */
if (ENV_PAYLOAD_LOADER)
return true;
/* Only other use of LZMA is ramstage compression. */
if (!CONFIG(COMPRESS_RAMSTAGE_LZMA))
return false;
if (ENV_ROMSTAGE && CONFIG(POSTCAR_STAGE))
return false;
if ((ENV_ROMSTAGE || ENV_POSTCAR) && !CONFIG(COMPRESS_RAMSTAGE_LZMA))
return false;
if (ENV_SMM)
return false;
return true;
/* If there is a postcar, it loads the ramstage. */
if (CONFIG(POSTCAR_STAGE))
return ENV_POSTCAR;
/* If there is no postcar but a separate romstage, it loads the ramstage. */
if (CONFIG(SEPARATE_ROMSTAGE))
return ENV_SEPARATE_ROMSTAGE;
/* Otherwise, the combined bootblock+romstage loads the ramstage. */
return ENV_BOOTBLOCK;
}
static bool cbfs_file_hash_mismatch(const void *buffer, size_t size,
@ -333,7 +338,7 @@ void cbfs_preload(const char *name)
dead_code();
/* We don't want to cross the vboot boundary */
if (ENV_ROMSTAGE && CONFIG(VBOOT_STARTS_IN_ROMSTAGE))
if (ENV_SEPARATE_ROMSTAGE && CONFIG(VBOOT_STARTS_IN_ROMSTAGE))
return;
DEBUG("%s(name='%s')\n", __func__, name);

8
src/lib/prog_loaders.c
View File

@ -9,6 +9,7 @@
#include <program_loading.h>
#include <reset.h>
#include <rmodule.h>
#include <romstage_common.h>
#include <security/vboot/vboot_common.h>
#include <stage_cache.h>
#include <symbols.h>
@ -16,6 +17,13 @@
void run_romstage(void)
{
if (!CONFIG(SEPARATE_ROMSTAGE)) {
/* Call romstage instead of loading it as a cbfs file. */
timestamp_add_now(TS_ROMSTAGE_START);
romstage_main();
dead_code();
}
struct prog romstage =
PROG_INIT(PROG_ROMSTAGE, CONFIG_CBFS_PREFIX "/romstage");

2
src/mainboard/emulation/qemu-armv7/romstage.c
View File

@ -5,11 +5,13 @@
#include <program_loading.h>
#include <romstage_common.h>
#if CONFIG(SEPARATE_ROMSTAGE)
void main(void)
{
console_init();
romstage_main();
}
#endif
void __noreturn romstage_main(void)
{

2
src/mainboard/emulation/qemu-riscv/memlayout.ld
View File

@ -17,7 +17,7 @@ SECTIONS
SRAM_END(STAGES_START)
DRAM_START(STAGES_START)
#if ENV_ROMSTAGE
#if ENV_SEPARATE_ROMSTAGE
ROMSTAGE(STAGES_START, 128K)
#endif
#if ENV_RAMSTAGE

2
src/mainboard/facebook/fbg1701/board_verified_boot.c
View File

@ -7,8 +7,10 @@
* items to the TPM
*/
const verify_item_t bootblock_verify_list[] = {
#if CONFIG(SEPARATE_ROMSTAGE)
{ VERIFY_FILE, ROMSTAGE, { { NULL, CBFS_TYPE_STAGE } },
HASH_IDX_ROM_STAGE, MBOOT_PCR_INDEX_0 },
#endif
{ VERIFY_FILE, BOOTBLOCK, { { NULL, CBFS_TYPE_BOOTBLOCK } },
HASH_IDX_BOOTBLOCK, MBOOT_PCR_INDEX_0 },
{ VERIFY_FILE, FSP, { { NULL, CBFS_TYPE_FSP } }, HASH_IDX_FSP,

2
src/mainboard/google/butterfly/chromeos.c
View File

@ -39,7 +39,7 @@ int get_lid_switch(void)
return (ec_mem_read(EC_HW_GPI_STATUS) >> EC_GPI_LID_STAT_BIT) & 1;
}
/* FIXME: VBOOT reads this in ENV_ROMSTAGE. */
/* FIXME: VBOOT reads this in ENV_SEPARATE_ROMSTAGE. */
int get_recovery_mode_switch(void)
{
if (ENV_RAMSTAGE)

4
src/mainboard/google/daisy/romstage.c
View File

@ -118,6 +118,7 @@ static struct mem_timings *setup_clock(void)
return mem;
}
#if CONFIG(SEPARATE_ROMSTAGE)
void main(void)
{
timestamp_init(timestamp_get());
@ -126,10 +127,11 @@ void main(void)
/*
* From the clocks comment below it looks like serial console won't
* work in the bootblock so keep in the romstage_main flow even with
* !CONFIG SEPARATE_ROMSTAGE.
* !CONFIG(SEPARATE_ROMSTAGE).
*/
romstage_main();
}
#endif
void __noreturn romstage_main(void)
{

4
src/mainboard/google/peach_pit/romstage.c
View File

@ -202,6 +202,7 @@ static void simple_spi_test(void)
#define simple_spi_test()
#endif
#if CONFIG(SEPARATE_ROMSTAGE)
void main(void)
{
timestamp_init(timestamp_get());
@ -210,10 +211,11 @@ void main(void)
/*
* From the clocks comment below it looks like serial console won't
* work in the bootblock so keep in the romstage_main flow even with
* !CONFIG SEPARATE_ROMSTAGE.
* !CONFIG(SEPARATE_ROMSTAGE).
*/
romstage_main();
}
#endif
void __noreturn romstage_main(void)
{

2
src/mainboard/google/veyron/romstage.c
View File

@ -63,6 +63,7 @@ static void sdmmc_power_off(void)
rk808_configure_ldo(5, 0); /* VCC33_SD */
}
#if CONFIG(SEPARATE_ROMSTAGE)
void main(void)
{
timestamp_add_now(TS_ROMSTAGE_START);
@ -72,6 +73,7 @@ void main(void)
romstage_main();
}
#endif
void __noreturn romstage_main(void)
{

2
src/mainboard/google/veyron_mickey/romstage.c
View File

@ -57,6 +57,7 @@ static void configure_l2ctlr(void)
write_l2ctlr(l2ctlr);
}
#if CONFIG(SEPARATE_ROMSTAGE)
void main(void)
{
timestamp_add_now(TS_ROMSTAGE_START);
@ -66,6 +67,7 @@ void main(void)
romstage_main();
}
#endif
void __noreturn romstage_main(void)
{

2
src/mainboard/google/veyron_rialto/romstage.c
View File

@ -63,6 +63,7 @@ static void sdmmc_power_off(void)
rk808_configure_ldo(5, 0); /* VCC33_SD */
}
#if CONFIG(SEPARATE_ROMSTAGE)
void main(void)
{
timestamp_add_now(TS_ROMSTAGE_START);
@ -72,6 +73,7 @@ void main(void)
romstage_main();
}
#endif
void __noreturn romstage_main(void)
{

2
src/mainboard/ti/beaglebone/romstage.c
View File

@ -45,12 +45,14 @@ static struct emif_regs ddr3_beagleblack_emif_reg_data = {
.emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY,
};
#if CONFIG(SEPARATE_ROMSTAGE)
void main(void)
{
console_init();
printk(BIOS_INFO, "Hello from romstage.\n");
romstage_main();
}
#endif
void __noreturn romstage_main(void)
{

1
src/security/vboot/Kconfig
View File

@ -90,6 +90,7 @@ config VBOOT_STARTS_BEFORE_BOOTBLOCK
config VBOOT_STARTS_IN_BOOTBLOCK
bool
default n
depends on SEPARATE_ROMSTAGE
help
Firmware verification happens during the end of or right after the
bootblock. This implies that a static VBOOT2_WORK() buffer must be

6
src/security/vboot/Makefile.inc
View File

@ -43,7 +43,9 @@ $(1)-srcs += $$(VBOOT_LIB_$(1))
endef # vboot-for-stage
$(eval $(call vboot-for-stage,bootblock))
ifeq ($(CONFIG_SEPARATE_ROMSTAGE),y)
$(eval $(call vboot-for-stage,romstage))
endif
$(eval $(call vboot-for-stage,ramstage))
$(eval $(call vboot-for-stage,postcar))
@ -157,7 +159,11 @@ else # CONFIG_VBOOT_SEPARATE_VERSTAGE
ifeq ($(CONFIG_VBOOT_STARTS_IN_BOOTBLOCK),y)
postinclude-hooks += $$(eval bootblock-srcs += $$(verstage-srcs))
else
ifeq ($(CONFIG_SEPARATE_ROMSTAGE),y)
postinclude-hooks += $$(eval romstage-srcs += $$(verstage-srcs))
else
postinclude-hooks += $$(eval bootblock-srcs += $$(verstage-srcs))
endif
endif
endif # CONFIG_VBOOT_SEPARATE_VERSTAGE

2
src/security/vboot/misc.h
View File

@ -48,7 +48,7 @@ static inline int verification_should_run(void)
if (CONFIG(VBOOT_SEPARATE_VERSTAGE))
return ENV_SEPARATE_VERSTAGE;
else if (CONFIG(VBOOT_STARTS_IN_ROMSTAGE))
return ENV_ROMSTAGE;
return ENV_RAMINIT;
else if (CONFIG(VBOOT_STARTS_IN_BOOTBLOCK))
return ENV_BOOTBLOCK;
else

2
src/security/vboot/vboot_common.c
View File

@ -29,7 +29,7 @@ static void save_secdata(struct vb2_context *ctx)
void vboot_save_data(struct vb2_context *ctx)
{
if (!verification_should_run() && !(ENV_ROMSTAGE && CONFIG(VBOOT_EARLY_EC_SYNC))) {
if (!verification_should_run() && !(ENV_RAMINIT && CONFIG(VBOOT_EARLY_EC_SYNC))) {
if (ctx->flags
& (VB2_CONTEXT_SECDATA_FIRMWARE_CHANGED
| VB2_CONTEXT_SECDATA_KERNEL_CHANGED))

2
src/soc/intel/common/block/systemagent/memmap.c
View File

@ -74,7 +74,7 @@ void fill_postcar_frame(struct postcar_frame *pcf)
* Store the top_of_ram (ramtop) into the CMOS if SOC_INTEL_COMMON_BASECODE_RAMTOP
* config is enabled.
*/
if (ENV_ROMSTAGE && CONFIG(SOC_INTEL_COMMON_BASECODE_RAMTOP))
if (ENV_CREATES_CBMEM && CONFIG(SOC_INTEL_COMMON_BASECODE_RAMTOP))
update_ramtop(top_of_ram);
postcar_frame_add_mtrr(pcf, top_of_ram - 16 * MiB, 16 * MiB, MTRR_TYPE_WRBACK);

2
src/vendorcode/eltan/security/verified_boot/vboot_check.c
View File

@ -363,7 +363,7 @@ int prog_locate_hook(struct prog *prog)
if (ENV_BOOTBLOCK)
verified_boot_bootblock_check();
if (ENV_ROMSTAGE) {
if (ENV_RAMINIT) {
if (!initialized && ((prog->type == PROG_REFCODE) ||
(prog->type == PROG_POSTCAR))) {
verified_boot_early_check();

2
tests/lib/imd_cbmem-test.c
View File

@ -81,7 +81,7 @@ static void test_cbmem_top(void **state)
{
cbmem_top_init_once();
if (ENV_ROMSTAGE)
if (ENV_CREATES_CBMEM)
assert_ptr_equal(cbmem_top_chipset(), cbmem_top());
if (ENV_POSTCAR || ENV_RAMSTAGE)