mb/google/brya/var/brya0: update PL1 minimum value

Update Power Limit1 (PL1) minimum value to 15W based on the Brya
design.

BRANCH=firmware-brya-14505.B
BUG=b:235311241
TEST=Built and tested on Brya system

Change-Id: Ifd5256221b82eae2cfe8009918f8ff4791751b4d
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72868
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
This commit is contained in:
Sumeet Pawnikar 2023-02-07 12:57:30 +05:30 committed by Felix Held
parent 94f90c5aea
commit a2e0c3d209
1 changed files with 1 additions and 1 deletions

View File

@ -194,7 +194,7 @@ chip soc/intel/alderlake
register "controls.power_limits" = "{
.pl1 = {
.min_power = 3000,
.min_power = 15000,
.max_power = 15000,
.time_window_min = 28 * MSECS_PER_SEC,
.time_window_max = 32 * MSECS_PER_SEC,