mb/google/brya/var/brya0: update PL1 minimum value
Update Power Limit1 (PL1) minimum value to 15W based on the Brya design. BRANCH=firmware-brya-14505.B BUG=b:235311241 TEST=Built and tested on Brya system Change-Id: Ifd5256221b82eae2cfe8009918f8ff4791751b4d Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72868 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
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@ -194,7 +194,7 @@ chip soc/intel/alderlake
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register "controls.power_limits" = "{
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.pl1 = {
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.min_power = 3000,
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.min_power = 15000,
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.max_power = 15000,
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.time_window_min = 28 * MSECS_PER_SEC,
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.time_window_max = 32 * MSECS_PER_SEC,
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