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vc/amd/fsp/picasso: increase FSPS UPD block size from 0x152 to 0x202 

We will need more FSPS UPD space for PEI GOP changes coming.

BUG=b:171234996
BRANCH=Zork

Cq-Depend: chrome-internal:3609213, chromium:50576
Change-Id: I35d0bb0ee30e04f66882b6103acd9d673d040c07
Signed-off-by: Nikolai Vyssotski <nikolai.vyssotski@amd.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50552
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Nikolai Vyssotski 2021-02-11 10:48:05 -06:00 committed by Felix Held
parent 794f1e785d
commit a2e5746c81
1 changed files with 2 additions and 2 deletions
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4
src/vendorcode/amd/fsp/picasso/FspsUpd.h
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@ -65,8 +65,8 @@ typedef struct __packed {
/** Offset 0x014A**/ uint8_t usb_3_rx_vref_ctrl_en_x; /** Offset 0x014A**/ uint8_t usb_3_rx_vref_ctrl_en_x;
/** Offset 0x014B**/ uint8_t usb_3_tx_vboost_lvl_x; /** Offset 0x014B**/ uint8_t usb_3_tx_vboost_lvl_x;
/** Offset 0x014C**/ uint8_t usb_3_tx_vboost_lvl_en_x; /** Offset 0x014C**/ uint8_t usb_3_tx_vboost_lvl_en_x;
/** Offset 0x014D**/ uint8_t UnusedUpdSpace0[3]; /** Offset 0x014D**/ uint8_t UnusedUpdSpace0[179];
/** Offset 0x0150**/ uint16_t UpdTerminator; /** Offset 0x0200**/ uint16_t UpdTerminator;
} FSP_S_CONFIG; } FSP_S_CONFIG;
/** Fsp S UPD Configuration /** Fsp S UPD Configuration