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Fix implicit declarations in the AMD DBM690T target by using the right 

header files.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Zheng Bao <Zheng.bao@amd.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3843 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Carl-Daniel Hailfinger 2008-12-24 17:58:44 +00:00
parent 1cced2fe70
commit a2f722abd4
2 changed files with 5 additions and 0 deletions
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2
src/mainboard/amd/dbm690t/fadt.c
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@ -25,6 +25,8 @@
#include <console/console.h> #include <console/console.h>
#include <arch/acpi.h> #include <arch/acpi.h>
#include <arch/io.h> #include <arch/io.h>
#include <device/device.h>
#include <../southbridge/amd/sb600/sb600.h>
/*extern*/ u16 pm_base = 0x800; /*extern*/ u16 pm_base = 0x800;
/* pm_base should be set in sb acpi */ /* pm_base should be set in sb acpi */

3
src/mainboard/amd/dbm690t/mainboard.c
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@ -25,6 +25,7 @@
#include <cpu/x86/msr.h> #include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h> #include <cpu/amd/mtrr.h>
#include <device/pci_def.h> #include <device/pci_def.h>
#include <../southbridge/amd/sb600/sb600.h>
#include "chip.h" #include "chip.h"
#define ADT7461_ADDRESS 0x4C #define ADT7461_ADDRESS 0x4C
@ -34,6 +35,8 @@
extern int do_smbus_read_byte(u32 smbus_io_base, u32 device, u32 address); extern int do_smbus_read_byte(u32 smbus_io_base, u32 device, u32 address);
extern int do_smbus_write_byte(u32 smbus_io_base, u32 device, u32 address, extern int do_smbus_write_byte(u32 smbus_io_base, u32 device, u32 address,
u8 val); u8 val);
extern void lb_add_memory_range(struct lb_memory *mem, uint32_t type,
uint64_t start, uint64_t size);
#define ADT7461_read_byte(address) \ #define ADT7461_read_byte(address) \
do_smbus_read_byte(SMBUS_IO_BASE, ADT7461_ADDRESS, address) do_smbus_read_byte(SMBUS_IO_BASE, ADT7461_ADDRESS, address)
#define ARA_read_byte(address) \ #define ARA_read_byte(address) \